Dopant selective reactive ion etching of silicon carbide

• US 9,452,926 B1
• Filed: 07/30/2012
• Issued: 09/27/2016
• Est. Priority Date: 07/30/2012
• Status: Active Grant

• Current Assignee: United States Administrator of National Aeronautics and Space Administration
• Original Assignee: United States Administrator of National Aeronautics and Space Administration
• Inventors: Okojie, Robert
• Primary Examiner(s): Vu, David
• Application Number:
  US13/561,359
• Time in Patent Office: 1,520 Days
• Field of Search: 438/706, 438/710
• US Class Current: 1/1
• CPC Class Codes: B81B 2201/0264 Pressure sensors
• CPC Class Codes: B81B 2203/0109 Bridges
• CPC Class Codes: B81C 1/0015 Cantilevers switches using MEMS H01H1/0036; electrostatic relays using micromechanics H01H59/0009; microelectro-mechanical resonators H03H9/02244
• CPC Class Codes: B81C 1/00531 Dry etching
• CPC Class Codes: B81C 1/00555 Achieving a desired geometry, i.e. controlling etch rates, anisotropy or selectivity B81C1/00023 - B81C1/0019 take precedence
• CPC Class Codes: B81C 1/00595 Control etch selectivity
• CPC Class Codes: B81C 2201/0132 Dry etching, i.e. plasma etching, barrel etching, reactive ion etching [RIE], sputter etching or ion milling
• CPC Class Codes: B81C 2201/0136 by doping limited material regions

Abstract

A method for selectively etching a substrate is provided. In one embodiment, an epilayer is grown on top of the substrate. A resistive element may be defined and etched into the epilayer. On the other side of the substrate, the substrate is selectively etched up to the resistive element, leaving a suspended resistive element.

Claims

1. A method, comprising:

providing a semi-insulated SiC substrate layer with an N-type SiC layer on one side;

determining an etch selectively based on the etch rate of the semi-insulated SiC substrate divided by the etch rate of the N-type SiC;

determining a flow rate of gas for maximizing the etch selectivity;

determining, based upon the etch selectivity, the etching time; and

dopant selective reactive ion etching the semi-insulated SiC substrate layer based on the determined flow rate for the determined etching time to remove the semi-insulated SiC substrate layer through a vertical etch profile but minimally affecting the N-type SiC layer.

2. The method of claim 1, wherein the dopant selective reactive ion etching of the semi-insulated substrate comprises selectively releasing or lowering the etch rate on a resistive element formed in a heavily doped epilayer.

3. The method of claim 1, further comprising:

growing a heavily doped epilayer on semi-insulated substrate.

4. The method of claim 3, further comprising:

defining a pattern of a resistive element in a heavily doped epilayer.

5. The method of claim 4, further comprising:

etching the heavily doped epilayer to form a resistive element based on the defined pattern.

6. The method of claim 3, wherein the heavily doped substrate comprises a thickness of less than 5 microns.

7. The method of claim 1, further comprising:

defining a pattern on the semi-insulated substrate to selectively etch the semi-insulated substrate.