Memory duplication by destination host in virtual machine live migration

• US 9,459,902 B2
• Filed: 08/16/2013
• Issued: 10/04/2016
• Est. Priority Date: 08/16/2013
• Status: Active Grant

• Current Assignee: Red Hat Israel Ltd. (International Business Machines Corporation)
• Original Assignee: Red Hat Israel Ltd. (International Business Machines Corporation)
• Inventors: Tsirkin, Michael, Noel, Karen
• Primary Examiner(s): Yi, David X
• Assistant Examiner(s): Mercado, Ramon A
• Application Number:
  US13/968,860
• Publication Number:
  US 20150052323A1
• Time in Patent Office: 1,145 Days
• US Class Current: 1/1
• CPC Class Codes: G06F 12/00 Accessing, addressing or allocating within memory systems or architectures digital input from, or digital output to record carriers, e.g. to disk storage units, G06F3/06
• CPC Class Codes: G06F 2009/4557 Distribution of virtual machine instances; Migration and load balancing
• CPC Class Codes: G06F 2009/45583 Memory management, e.g. access or allocation
• CPC Class Codes: G06F 9/4413 Plug-and-play [PnP]
• CPC Class Codes: G06F 9/45558 Hypervisor-specific management and integration aspects

Abstract

Systems and methods for memory de-duplication in a virtual machine undergoing live migration. An example method may comprise: receiving, by a hypervisor executing on a destination host computer system, a first virtual address and a corresponding physical memory range identifier, the physical memory range identifier identifying a first physical memory range on an origin host computer system, the first virtual address identifying a first virtual memory range mapped to the first physical memory range in a virtual address space of a first virtual machine undergoing live migration from the origin host computer system to the destination host computer system; identifying a second virtual address corresponding to the physical memory range identifier, the second virtual address identifying a second virtual memory range in a virtual address space of a second virtual machine undergoing live migration from the origin host computer system to the destination host computer system; identifying a destination physical address corresponding to the second virtual address, the destination physical address identifying a second physical memory range on the destination host computer system; and mapping, on the destination host computer system, the first virtual address to the destination physical address.

Claims

1. A method, comprising:

receiving, by a processor of a destination host computer system, a first virtual address and a corresponding source physical address, the source physical address identifying a first physical memory portion on an origin host computer system, the first virtual address identifying a first virtual memory address range mapped to the first physical memory portion in a virtual address space of a first virtual machine undergoing live migration from the origin host computer system to the destination host computer system;

identifying a second virtual address corresponding to the source physical address, the second virtual address identifying a second virtual memory address range in a virtual address space of a second virtual machine undergoing live migration from the origin host computer system to the destination host computer system;

identifying a destination physical address corresponding to the second virtual address, the destination physical address identifying a second physical memory portion on the destination host computer system;

mapping, on the destination host computer system, the first virtual address to the destination physical address;

responsive to detecting a modification of a virtual memory page of the first virtual memory address range, copying, to a new physical memory page, a physical memory page corresponding to the virtual memory page; and

mapping the modified virtual memory page to the new physical memory page.

2. The method of claim 1, wherein identifying the second virtual address further comprises looking up the source physical address in a data structure comprising a plurality of memory mapping entries, each memory mapping entry mapping a virtual memory address range to a physical memory portion.

3. The method of claim 1, wherein the source physical address comprises at least one of a memory device identifier and a memory address on a memory device identified by the memory device identifier.

4. The method of claim 1, wherein the destination physical address comprises a memory device identifier and a memory address on a memory device identified by the memory device identifier.

5. The method of claim 1, wherein the physical memory portion comprises one or more physical memory pages.

6. The method of claim 1, wherein the first virtual memory address range comprises one or more virtual memory pages.

7. The method of claim 1, wherein the second virtual memory address range comprises one or more virtual memory pages.

8. A system comprising:

a memory comprising a first physical memory portion; and

a processor, operatively coupled to the memory, to;

receive a first virtual address and a corresponding source physical address, the source physical address identifying the first physical memory portion on an origin host computer system, the first virtual address identifying a first virtual memory address range mapped to the first physical memory portion in a virtual address space of a first virtual machine undergoing live migration from the origin host computer system to a destination host computer system;

identify a second virtual address corresponding to the source physical address, the second virtual address identifying a second virtual memory address range in a virtual address space of a second virtual machine undergoing live migration from the origin host computer system to the destination host computer system;

identify a destination physical address corresponding to the second virtual address, the destination physical address identifying a second physical memory portion on the destination host computer system;

map, on the destination host computer system, the first virtual address to the destination physical address;

responsive to detecting a modification of a virtual memory page of the first virtual memory address range, copy, to a new physical memory page, a physical memory page corresponding to the virtual memory page; and

map the modified virtual memory page to the new physical memory page.

9. The system of claim 8, wherein the processor is further to provide a data structure comprising a plurality of memory mapping entries, each memory mapping entry mapping a virtual memory address range to a physical memory portion.

10. The system of claim 8, wherein the source physical address comprises at least one of a memory device identifier and a memory address on a memory device identified by the memory device identifier.

11. The system of claim 8, wherein the destination physical address comprises a memory device identifier and a memory address on a memory device identified by the memory device identifier.

12. The system of claim 8, wherein the physical memory portion comprises one or more physical memory pages.

13. A computer-readable non-transitory storage medium comprising executable instructions that, when executed by a processor, cause the processor to:

receive, by the processor, a first virtual address and a corresponding source physical address, the source physical address identifying a first physical memory portion on an origin host computer system, the first virtual address identifying a first virtual memory address range mapped to the first physical memory portion in a virtual address space of a first virtual machine undergoing live migration from the origin host computer system to a destination host computer system;

identify a second virtual address corresponding to the source physical address, the second virtual address identifying a second virtual memory address range in a virtual address space of a second virtual machine undergoing live migration from the origin host computer system to the destination host computer system;

identify a destination physical address corresponding to the second virtual address, the destination physical address identifying a second physical memory portion on the destination host computer system;

map, on the destination host computer system, the first virtual address to the destination physical address;

responsive to detecting a modification of a virtual memory page of the first virtual memory address range, copy, to a new physical memory page, a physical memory page corresponding to the virtual memory page; and

map the modified virtual memory page to the new physical memory page.

14. The computer-readable non-transitory storage medium of claim 13, further comprising executable instructions causing the processor to provide a data structure comprising a plurality of memory mapping entries, each memory mapping entry mapping a virtual memory address range to a physical memory portion.

15. The computer-readable non-transitory storage medium of claim 13, wherein the source physical address comprises at least one of a memory device identifier and a memory address on a memory device identified by the memory device identifier.

16. The computer-readable non-transitory storage medium of claim 13, wherein the destination physical address comprises a memory device identifier and a memory address on a memory device identified by the memory device identifier.