Method and system for template assisted wafer bonding

• US 9,461,026 B2
• Filed: 04/04/2014
• Issued: 10/04/2016
• Est. Priority Date: 12/08/2010
• Status: Active Grant

• Current Assignee: Skorpios Technologies Inc.
• Original Assignee: Skorpios Technologies Inc.
• Inventors: Dallesasse, John, Krasulick, Stephen B.
• Primary Examiner(s): Lee, Cheung
• Application Number:
  US14/245,191
• Publication Number:
  US 20140342500A1
• Time in Patent Office: 914 Days
• US Class Current: 1/1
• CPC Class Codes: H01L 21/78 with subsequent division of the substrate into plural individual devices cutting to change the surface-physical characteristics or shape of semiconductor bodies H01L21/304
• CPC Class Codes: H01L 21/822 the substrate being a semiconductor, using silicon technology H01L21/8258 takes precedence
• CPC Class Codes: H01L 23/50 for integrated circuit devices, e.g. power bus, number of leadsH01L23/482 - H01L23/498 take precedence
• CPC Class Codes: H01L 24/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 25/167 comprising optoelectronic devices, e.g. LED, photodiodes
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/1204 Optical Diode
• CPC Class Codes: H01L 2924/12042 LASER
• CPC Class Codes: H01L 2924/14 Integrated circuits
• CPC Class Codes: H01L 31/1876 Particular processes or apparatus for batch treatment of the devices
• CPC Class Codes: H01L 33/005 Processes
• CPC Class Codes: H01L 33/48 characterised by the semiconductor body packages
• CPC Class Codes: H01L 33/52 Encapsulations
• CPC Class Codes: H01S 5/0217 Removal of the substrate
• CPC Class Codes: H01S 5/026 Monolithically integrated components, e.g. waveguides, monitoring photo-detectors, drivers stabilisation of output H01S5/06

Abstract

A method of fabricating a composite semiconductor structure includes providing a substrate including a plurality of devices and providing a compound semiconductor substrate including a plurality of photonic devices. The method also includes dicing the compound semiconductor substrate to provide a plurality of photonic dies. Each die includes one or more of the plurality of photonics devices. The method further includes providing an assembly substrate, mounting the plurality of photonic dies on predetermined portions of the assembly substrate, aligning the substrate and the assembly substrate, joining the substrate and the assembly substrate to form a composite substrate structure, and removing at least a portion of the assembly substrate from the composite substrate structure.

Claims

1. A method of fabricating a composite semiconductor structure, the method comprising:

providing a first substrate having a device surface and one or more semiconductor devices thereon;

providing a second substrate having epitaxial compound semiconductor materials;

dicing the second substrate to provide a plurality of compound semiconductor seed dies;

bonding at least one of the plurality of compound semiconductor seed dies to the first substrate to form the composite semiconductor structure; and

growing epitaxial compound semiconductor layers on the at least one of the plurality of compound semiconductor seed dies.

2. The method of fabricating the composite semiconductor structure as recited in claim 1, wherein:

the device surface is part of a device layer of a silicon-on-insulator (SOI) wafer;

the SOI wafer comprises a silicon-dioxide layer under the device surface; and

the SOI wafer comprises a silicon handle under the silicon-dioxide layer.

3. The method of fabricating the composite semiconductor structure as recited in claim 1, wherein the one or more semiconductor devices comprise at least one of a CMOS device, a BiCMOS device, an NMOS device, a PMOS device, a detector, a CCD, or an optics device.

4. The method of fabricating the composite semiconductor structure as recited in claim 1, further comprising:

mounting the at least one of the plurality of compound semiconductor seed dies to a third substrate; and

removing the third substrate from the least one of the plurality of compound semiconductor seed dies after bonding the at least one of the plurality of compound semiconductor seed dies to the first substrate.

5. The method of fabricating the composite semiconductor structure as recited in claim 1, wherein the composite semiconductor structure comprises one or more photonic devices, wherein the one or more photonic devices includes a laser, a detector, a modulator, an optical isolator, and/or an optical circulator.

6. The method of fabricating the composite semiconductor structure as recited in claim 1, the method further comprising bonding the plurality of compound semiconductor seed dies to the first substrate.

7. The method of fabricating the composite semiconductor structure as recited in claim 1, wherein:

the first substrate is etched to form a pit; and

at least one of the plurality of compound semiconductor seed dies is bonded in the pit.

8. The method of fabricating the composite semiconductor structure as recited in claim 7, wherein the at least one of the plurality of compound semiconductor seed dies is covered after being bonded in the pit.

9. The method of fabricating the composite semiconductor structure as recited in claim 1, wherein the plurality of compound semiconductor seed dies comprise III-V or II-VI material.

10. The method of fabricating the composite semiconductor structure as recited in claim 1, wherein the first substrate comprises silicon.

11. The method of fabricating the composite semiconductor structure as recited in claim 1, wherein the first substrate comprises optical elements formed in silicon.

12. The method of fabricating the composite semiconductor structure as recited in claim 11 further comprising, after growing epitaxial compound semiconductor layers, fabricating gate metals on doped regions of the first substrate.

13. The method of fabricating the composite semiconductor structure as recited in claim 1, further comprising defining one or more functional elements on the at least one of the plurality of compound semiconductor seed dies after bonding the at least one of the plurality of compound semiconductor seed dies to the first substrate.