×

Orthogonal differential vector signaling codes with embedded clock

  • US 9,461,862 B2
  • Filed: 08/03/2015
  • Issued: 10/04/2016
  • Est. Priority Date: 08/01/2014
  • Status: Active Grant
First Claim
Patent Images

1. A method comprising:

  • receiving, at a plurality of multi-input comparators (MICs) via a multi-wire bus, a set of symbols of a codeword of a vector signaling code, the set of symbols representing a transformation of an input vector with a non-simple orthogonal or unitary matrix, the input vector comprising a plurality of sub-channels, wherein at least one sub-channel corresponds to an input data signal and wherein at least one sub-channel corresponds to a data-aligned strobe signal;

    forming a plurality of MIC output signals, each data MIC output signal of the plurality of data MIC output signals generated by a corresponding MIC comparing a subset of symbols of the codeword, and wherein each data MIC has a set of respective data input coefficients corresponding to a respective subchannel;

    generating a timing MIC output signal using a corresponding timing MIC connected to all the wires of the multi-wire bus to form a comparison of the set of symbols of the codeword, wherein the timing MIC has a set of timing input coefficients orthogonal to each set of respective data input coefficients to remove the at least one data signal from the timing MIC output signal; and

    sampling the plurality of data MIC output signals according to the timing MIC output signal.

View all claims
  • 1 Assignment
Timeline View
Assignment View
    ×
    ×