MEMS capacitive pressure sensors
First Claim
1. A MEMS capacitive pressure sensor, comprising:
- a substrate having a first region and a second region;
a first dielectric layer formed on one surface of the substrate;
a first electrode layer formed on the first dielectric layer;
a second dielectric layer formed on the first electrode layer and having a plurality of first openings;
a plurality of conductive sidewalls connecting with the first electrode layer on sidewalls of the first openings;
a second electrode layer with a portion formed on the second dielectric layer in the second region and the rest suspended over the conductive sidewalls in the first region, causing a chamber between the conductive sidewalls and the second electrode layer;
a third dielectric layer on the second electrode layer exposing a portion of the second electrode layer in the device region; and
a fourth dielectric layer utilized as an etching stop layer on the second electrode layer.
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Abstract
A MEMS capacitive pressure sensor is provided. The pressure sensor includes a substrate having a first region and a second region, and a first dielectric layer formed on the substrate. The pressure sensor also includes a first electrode layer formed on the first dielectric layer, and a second dielectric layer having first openings formed on the first electrode layer. Further, the pressure sensor includes conductive sidewalls connecting with the first electrode layer formed on sidewalls of the first openings, and a second electrode layer with a portion formed on the second dielectric layer in the second region and the rest suspended over the conductive sidewalls in the first region. Further, the pressure sensor also includes a chamber between the conductive sidewalls and the second electrode layer; and a third dielectric layer formed on the second electrode layer exposing a portion of the second electrode layer in the first region.
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Citations
11 Claims
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1. A MEMS capacitive pressure sensor, comprising:
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a substrate having a first region and a second region; a first dielectric layer formed on one surface of the substrate; a first electrode layer formed on the first dielectric layer; a second dielectric layer formed on the first electrode layer and having a plurality of first openings; a plurality of conductive sidewalls connecting with the first electrode layer on sidewalls of the first openings; a second electrode layer with a portion formed on the second dielectric layer in the second region and the rest suspended over the conductive sidewalls in the first region, causing a chamber between the conductive sidewalls and the second electrode layer; a third dielectric layer on the second electrode layer exposing a portion of the second electrode layer in the device region; and a fourth dielectric layer utilized as an etching stop layer on the second electrode layer. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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Specification