Memory with variable operation voltage and the adjusting method thereof

• US 9,465,430 B2
• Filed: 05/23/2014
• Issued: 10/11/2016
• Est. Priority Date: 05/23/2013
• Status: Active Grant

• Current Assignee: Etron Technology Inc, Industrial Technology Research Institute
• Original Assignee: Etron Technology Inc, Industrial Technology Research Institute
• Inventors: Shiah, Chun, Rong, Bor-Doou
• Primary Examiner(s): Norman, James G
• Application Number:
  US14/286,432
• Publication Number:
  US 20140351609A1
• Time in Patent Office: 872 Days
• US Class Current: 1/1
• CPC Class Codes: G06F 1/3275 Power saving in memory, e.g. RAM, cache
• CPC Class Codes: G06F 1/3296 by lowering the supply or operating voltage
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

A memory with variable operation voltage is disclosed. The disclosed DRAM comprises a core memory module, a register, and a first voltage adjustment module. The core memory module operates with a first control voltage. The register is used for storing a plurality of control signals and selecting one among the control signals as a voltage control signal according to an input signal. The first voltage adjustment module is respectively electrically connected to the register, the core memory module, and an external voltage, so as to provide the first control voltage according to the voltage control signal and the external voltage.

Claims

1. A memory with variable operation voltage, comprising:

a first core memory module operated by a first control voltage for accessing a first data;

a register for storing a plurality of control signals and selecting one among the control signals as a voltage control signal according to an input signal, wherein the register complies with a specification established by Joint Electron Device Engineering Council (JEDEC), wherein the register is different from the first core memory and the input signal is not determined according to the first control voltage; and

a first voltage adjustment module electrically connected to the register, the first core memory module and an external voltage, respectively, so as to provide the first control voltage according to the voltage control signal and the external voltage, so that the first control voltage is adjustable according to the voltage control signal, wherein the first voltage adjustment module comprises;

a first voltage source for draining power from the external voltage to provide a plurality of first voltages according to the external voltage; and

a first voltage regulator for draining power from the external voltage to output the first control voltage according to a first reference voltage;

wherein the first reference voltage is one among the plurality of first voltages.

2. The memory according to claim 1, wherein the first voltage adjustment module further comprises:

a first voltage selector electrically connected to the register, the first voltage source and the first voltage regulator, respectively, for electrically connecting one of the plurality of first voltages to the first voltage regulator as the first reference voltage.

3. The memory according to claim 1, further comprising:

a peripheral circuitry electrically connected to the first core memory module for accessing the first data in the core memory module according an access instruction; and

a second voltage adjustment module electrically connected to the register, a first peripheral circuitry and an external voltage signal, respectively, for providing a second control voltage to the first peripheral circuitry according to the voltage control signal and the external voltage.

4. The memory according to claim 3, further comprising:

a second core memory module for accessing a second data with a third control voltage; and

a second peripheral circuitry electrically connected the second core memory module and the second voltage adjustment module for accessing the second data in the second core memory module according to the access instruction;

wherein first voltage adjustment module electrically connected the second core memory module provides the third control voltage according the voltage control signal and the external voltage signal, and the second voltage adjustment module provides the second control voltage to the second peripheral circuitry.

5. The memory according to claim 3, wherein the second voltage adjustment module comprises:

a second voltage source for providing a plurality of second voltages;

a second voltage regulator for outputting the second control voltage according to a second reference voltage and the external voltage; and

a second voltage selector electrically connected to the register, the second voltage source and the second voltage regulator, respectively, for electrically connecting one of the plurality of second voltages to the second voltage regulator as the second reference voltage.

6. The memory according to claim 1, further comprises a voltage selector electrically connected to the voltage source for selecting one among the first voltages as the first reference voltage according to the voltage control signal, wherein the first voltage regulator comprises:

an amplifier electrically connected to the voltage selector for generating a current control signal according to the first reference voltage and the first control voltage;

an analog switch electrically connected to the external voltage and the amplifier for an current acquired from the external voltage according to the current control signal; and

an impedance element electrically connected to the analog switch and a ground terminal for generating the first control voltage with the current.

7. The memory according to claim 1, wherein the first voltage source comprises:

a current source having a first node and a second node connected to the external voltage, electrically connected to the register for adjusting a reference current according to the voltage control signal; and

an impedance element having a third node connected to the second node and a fourth node connected to a ground terminal;

wherein a voltage difference between the second node and the ground terminal defines the first reference voltage, while a reference current flows through the impedance element.

8. The memory according to claim 1, wherein the register is a mode register comprising:

a first register block for a plurality of operation mode data related to the core memory module; and

a second register block for storing the control signals and a lookup table comprising a corresponding relationship between the input signal and the voltage control signal.

9. The memory according to claim 1, wherein the first voltage source comprises:

a plurality of resisters connected in series between the external voltage and a ground terminal for providing the voltages.

10. A memory with variable operation voltage, comprising:

a plurality of core memory modules;

a plurality of peripheral circuitries;

a register complying with a specification established by Joint Electron Device Engineering Council (JEDEC), for storing a plurality of control signals; and

a voltage adjustment module respectively electrically connected to the register, the core memory modules, the peripheral circuitries, and an external voltage, so as to provide control voltages for the core memory modules and the peripheral circuitries according to the control signals and the external voltage, wherein the voltage adjustment module comprises;

a first voltage source for draining power from the external voltage to provide a plurality of first voltages according to the external voltage; and

a first voltage regulator for draining power from the external voltage to output one among the control voltages according to a first reference voltage;

wherein the first reference voltage is one among the plurality of first voltages.

11. The memory according to claim 10, wherein the memory divides the core memory modules into a first group and a second group according the control signals of the register, the voltage adjustment module provides the control voltages for the first group and the control voltages for the second group according the control signals and the external voltage, wherein the control voltages for the first group could be different from the control voltages for the second group.

12. The memory according to claim 10, wherein the memory divides the core memory modules into a first group and a second group according the control signals of the register, the register provides a first working frequency for the first group and a second working frequency for the second group according to the control signals.

13. The memory according to claim 10, wherein the memory divides the core memory modules into a first peripheral circuitry group and a second peripheral circuitry group according the control signals of the register, the voltage adjustment module provides the control voltages for the first peripheral circuitry group and the control voltages for the second peripheral circuitry group according the control signals and the external voltage, wherein the control voltages for the first peripheral circuitry group are the same as the control voltages for the second peripheral circuitry group.