Correlation detector

• US 9,466,364 B1
• Filed: 11/23/2015
• Issued: 10/11/2016
• Est. Priority Date: 10/20/2015
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Papandreou, Nikolaos, Sebastian, Abu, Tuma, Tomas
• Primary Examiner(s): Dinh, Son
• Assistant Examiner(s): Begum, Sultana
• Application Number:
  US14/949,126
• Time in Patent Office: 323 Days
• Field of Search: None
• US Class Current: 1/1
• CPC Class Codes: G11C 13/0004 comprising amorphous/crystalline phase transition cells
• CPC Class Codes: G11C 13/0061 Timing circuits or methods
• CPC Class Codes: G11C 13/0069 Writing or programming circuits or methods

Abstract

The invention is notably directed to a correlation detector comprising an input unit configured to receive a plurality of parallel data streams of discrete events. The correlation detector further comprises a memory array having a plurality of resistive memory elements. At least one resistive memory element is allocated to each of the parallel data streams. Furthermore, a programming array is provided comprising a plurality of programming elements. At least one programming element is allocated to each resistive memory element for applying a programming signal to the respective memory element. The correlation detector comprises further a control unit that is configured to control the programming signals as a function of a co-arrival characteristic of the discrete events. A correlation unit is configured to detect correlations between the received data streams based on resistance changes of the resistive memory elements. The invention further concerns a related method for detecting correlations.

Claims

1. A method for detecting correlations in a plurality of parallel data streams of discrete events, comprising:

receiving the plurality of parallel data streams of discrete events;

allocating at least one resistive memory element to each of the received data streams;

applying a programming signal to the respective memory element;

controlling the programming signal as a function of a co-arrival characteristic of the discrete events;

detecting correlations between the received data streams based on resistance changes of the resistive memory elements.

2. A method as claimed in claim 1, wherein the function of the co-arrival characteristic is a function of the number of co-arrivals of the discrete events at any instant in time.

3. A method as claimed in claim 1, wherein the function of the co-arrival characteristic is a function of the number of co-arrivals of the discrete events within a predefined interval of time.

4. A method as claimed in claim 1, further comprising:

controlling one of a voltage, a current and the duration of the application of power applied to the resistive memory elements.

5. A method as claimed in claim 1, comprising:

measuring a distribution of the resistance and/or conductance of the resistive memory elements.

6. A method as claimed in claim 1, comprising:

measuring a time at which the resistance and/or conductance of the resistive memory elements diverges.

7. A method as claimed in claim 1, comprising:

delaying one or more of the plurality of parallel data streams with a predefined delay.

8. A method as claimed in claim 1, comprising:

altering one or more of the plurality of parallel data streams such that an arrival of a discrete event is altered to a non-arrival and a non-arrival of a discrete event is altered to an arrival.