Apparatuses including stair-step structures and methods of forming the same
First Claim
1. A method of forming a semiconductor structure, comprising:
- forming a stack of N sets, each set of the N sets comprising an insulating material and a conductive material, N being an even number equal to or greater than 8, a topmost set of the N sets being defined as an Nth set, each of the N sets including a first region and a second region, the first regions of the N sets being vertically aligned with one another, the second regions of the N sets being vertically aligned with one another;
removing the second region of the Nth set to expose the second region of an (N-1)th set;
removing insulating material and conductive material from an upper portion of the N sets to produce a first intermediate structure in which steps in the first region of the N sets are formed respectively by (N-i)th sets, and steps in the second region of the N sets are formed respectively by (N-j)th sets, i being an even number inclusive of 0, j being an odd number;
forming and patterning a chop mask over the first intermediate structure to cover respective first portions of the steps in the first and second regions of the N sets while leaving respective second portions of the steps in the first and second regions of the N sets uncovered; and
removing insulating material and conductive material from the respective second portions of the steps in the first and second regions of the N sets of the first intermediate structure to form steps in a lower portion of the N sets.
7 Assignments
0 Petitions
Accused Products
Abstract
Methods for forming semiconductor structures are disclosed, including a method that involves forming sets of conductive material and insulating material, forming a first mask over the sets, forming a first number of contact regions, forming a second mask over a first region of the sets, and removing material from of the sets in a second, exposed region laterally adjacent the first region to form a second number of contact regions. Another method includes forming first and second contact regions on portions of sets of conductive materials and insulating materials, each of the second contact regions more proximal to an underlying substrate than each of the first contact regions. Apparatuses such as memory devices including laterally adjacent first and second regions each of which including contact regions of a different portion of a plurality of conductive materials and related methods of forming such devices are also disclosed.
-
Citations
23 Claims
-
1. A method of forming a semiconductor structure, comprising:
-
forming a stack of N sets, each set of the N sets comprising an insulating material and a conductive material, N being an even number equal to or greater than 8, a topmost set of the N sets being defined as an Nth set, each of the N sets including a first region and a second region, the first regions of the N sets being vertically aligned with one another, the second regions of the N sets being vertically aligned with one another; removing the second region of the Nth set to expose the second region of an (N-1)th set; removing insulating material and conductive material from an upper portion of the N sets to produce a first intermediate structure in which steps in the first region of the N sets are formed respectively by (N-i)th sets, and steps in the second region of the N sets are formed respectively by (N-j)th sets, i being an even number inclusive of 0, j being an odd number; forming and patterning a chop mask over the first intermediate structure to cover respective first portions of the steps in the first and second regions of the N sets while leaving respective second portions of the steps in the first and second regions of the N sets uncovered; and removing insulating material and conductive material from the respective second portions of the steps in the first and second regions of the N sets of the first intermediate structure to form steps in a lower portion of the N sets. - View Dependent Claims (2, 3, 4, 5, 6, 7)
-
-
8. A method of forming a semiconductor structure, comprising:
-
forming a first mask over a first region of stacked sets of alternating conductive material and insulating material; exposing a second region of the stacked sets laterally adjacent to the first region; removing exposed portions of the conductive material and insulating material from the second region of the stacked sets; forming stair-step structures in the first region and the second region of the stacked sets, comprising; forming a second mask over the first region and the second region of the stacked sets; recessing the second mask to expose one stair-width of the stacked sets; removing exposed portions of the conductive material and insulating material from the first and second regions of the stacked sets; and repeating the recessing the second mask and removing exposed portions of the conductive material and insulating material; forming a third mask over a first portion of the first region of the stacked sets and a first portion of the second region of the stacked sets; exposing a second portion of the first region of the stacked sets and a second portion of the second region of the stacked sets laterally adjacent to the first portions of the first region and second region of the stacked sets; and removing exposed portions of the conductive material and insulating material from the second portions of the first region and second region of the stacked sets. - View Dependent Claims (9, 10, 11, 12, 13, 14)
-
-
15. An apparatus, comprising:
two stair-step structures comprising contact regions of adjacent stacks of sets of conductive materials and insulating materials, the two stair-step structures located at respective edges of the adjacent stacks, the two stair-step structures facing each other to define a valley between the two stair-step structures, wherein each stair-step structure of the two stair-step structures comprises; a first region comprising first contact regions to a first group of conductive materials of the respective stack; and a second region laterally adjacent to the first region and comprising second contact regions to a second group of conductive materials of the respective stack, the second contact regions being vertically offset from the first contact regions. - View Dependent Claims (16, 17, 18, 19, 20, 21, 22, 23)
Specification