Method of forming a transistor and structure therefor

• US 9,466,708 B2
• Filed: 03/15/2013
• Issued: 10/11/2016
• Est. Priority Date: 03/15/2013
• Status: Active Grant

• Current Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Original Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Inventors: Padmanabhan, Balaji, Venkatraman, Prasad, Grivna, Gordon M.
• Primary Examiner(s): Islam, Mohammad
• Assistant Examiner(s): Chang, Jay C
• Application Number:
  US13/831,883
• Publication Number:
  US 20140264565A1
• Time in Patent Office: 1,306 Days
• Field of Search: None
• US Class Current: 1/1
• CPC Class Codes: H01L 29/407 Recessed field plates, e.g. trench field plates, buried field plates
• CPC Class Codes: H01L 29/4175 for lateral devices where the connection to the source or drain region is done through at least one part of the semiconductor substrate thickness, e.g. with connecting sink or with via-hole
• CPC Class Codes: H01L 29/41766 with at least part of the source or drain electrode having contact below the semiconductor surface, e.g. the source or drain electrode formed at least partially in a groove or with inclusions of conductor inside the semiconductor H01L29/41733 - H01L29/41758 take precedence
• CPC Class Codes: H01L 29/4236 within a trench, e.g. trench gate electrode, groove gate electrode
• CPC Class Codes: H01L 29/513 the variation being perpendicular to the channel plane
• CPC Class Codes: H01L 29/66621 using etching to form a recess at the gate location etching of semiconductor bodies H01L21/302
• CPC Class Codes: H01L 29/66636 with source or drain recessed by etching or first recessed by etching and then refilled
• CPC Class Codes: H01L 29/66666 Vertical transistors H01L29/66712, H01L29/66742 take precedence
• CPC Class Codes: H01L 29/66734 with a step of recessing the gate electrode, e.g. to form a trench gate electrode
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236
• CPC Class Codes: H01L 29/7827 Vertical transistors H01L29/7802, H01L29/78642 take precedence
• CPC Class Codes: H01L 29/7834 with a non-planar structure, e.g. the gate or the source or the drain being non-planar
• CPC Class Codes: H01L 29/7835 with asymmetrical source and drain regions, e.g. lateral high-voltage MISFETs with drain offset region, extended drain MISFETs

Abstract

In one embodiment, a semiconductor device is formed to include a gate structure extending into a semiconductor material that is underlying a first region of semiconductor material. The gate structure includes a conductor and also a gate insulator that has a first portion positioned between the gate conductor and a first portion of the semiconductor material that underlies the gate conductor. The first portion of the semiconductor material is configured to form a channel region of the transistor which underlies the gate conductor. The gate structure may also include a shield conductor overlying the gate conductor and having a shield insulator between the shield conductor and the gate conductor. The shield insulator may also have a second portion positioned between the shield conductor and a second portion of the gate insulator and a third portion overlying the shield conductor.

Claims

1. A transistor comprising:

a semiconductor substrate of a first conductivity type, the semiconductor substrate having a first surface and a second surface;

a first semiconductor region having a second conductivity type on the first surface of the semiconductor substrate;

a second semiconductor region formed within the first semiconductor region wherein a portion of the first semiconductor region underlies the second semiconductor region, the second semiconductor region having the first conductivity type;

a gate structure formed in an opening that extends from the second semiconductor region into the first semiconductor region;

a gate conductor of the gate structure formed within the opening and overlying a first portion of the first semiconductor region;

a source region adjacent the gate conductor and spaced laterally from the gate conductor;

a gate insulator between the gate conductor and the first portion of the first semiconductor region and between the source region and the gate conductor wherein a channel region of the transistor is in the first portion of the first semiconductor region so that current flows laterally between the source region and under the gate structure;

a shield conductor overlying the gate conductor; and

a shield insulator between the gate conductor and the shield conductor.

2. The transistor of claim 1 wherein the gate structure is devoid of the shield conductor underlying the gate conductor.

3. The transistor of claim 1 further including a source contact conductor extending through the second semiconductor region and through the source region and into the first semiconductor region to form an ohmic electrical connection to the source region and the first semiconductor region.

4. The transistor of claim 3 further including an insulator positioned between a portion of the source contact conductor that extends through the second semiconductor region.

5. The transistor of claim 3 wherein the source contact conductor directly contacts the source region and forms the ohmic electrical connection thereto and wherein the source region is devoid of a separate doped contact region positioned between the source contact conductor and the source region.

6. The transistor of claim 3 wherein the source contact conductor directly contacts the first semiconductor region and forms the ohmic electrical connection thereto and wherein the first semiconductor region is devoid of a separate doped contact region positioned between the source contact conductor and the first semiconductor region.

7. The transistor of claim 3 wherein the source contact conductor also forms an ohmic electrical contact to the shield conductor.

8. The transistor of claim 1 wherein the shield insulator is tapered to have a thickness that decreases as a distance into the second semiconductor region increases.

9. The transistor of claim 1 wherein the shield conductor is formed within another opening that is formed to extend into the shield insulator.

10. A semiconductor device comprising:

a semiconductor material of a first conductivity type having a first surface and a second surface;

a first doped region within the semiconductor material and having a second conductivity type;

a gate structure extending into the semiconductor material that is underlying the first doped region;

a gate conductor of the gate structure;

a gate insulator of the gate structure extending through the first doped region into the semiconductor material and having a first portion of the gate insulator positioned between the gate conductor and a first portion of the semiconductor material that is external to the first doped region and that underlies the gate conductor wherein the first portion of the semiconductor material is a channel region of the semiconductor device wherein the channel region is configured so that current flows laterally under the gate structure;

a shield conductor of the gate structure overlying the gate conductor; and

a shield insulator having a first portion overlying the shield conductor.

11. The semiconductor device of claim 10 wherein the gate structure includes an opening extending from a surface of the first doped region into the semiconductor material with the gate insulator positioned on a bottom of the opening and the gate conductor within the opening and on the gate insulator.

12. The semiconductor device of claim 11 wherein a second portion of the gate insulator is positioned along a sidewall of the opening and abutting the shield insulator.

13. The semiconductor device of claim 11 wherein the shield conductor is within the opening and overlying the gate conductor.

14. The semiconductor device of claim 10 further including a source region of the semiconductor device adjacent to and spaced apart from the gate conductor wherein the source region is also adjacent to an interface of the semiconductor material and the first doped region.

15. The semiconductor device of claim 10 wherein the shield insulator also includes a second portion positioned between the shield conductor and the gate conductor, and a third portion positioned between the shield conductor and a second portion of the gate insulator.

16. The semiconductor device of claim 10 wherein the gate structure has an end positioned in the semiconductor material and wherein the shield conductor overlies the end of the gate structure.

17. The semiconductor device of claim 10 wherein the gate structure has an end in the semiconductor material and wherein at least a portion of the channel region underlies the end of the gate structure.

18. The semiconductor device of claim 10 having a source region formed along an interface of the first doped region and the semiconductor material.

19. A semiconductor device comprising:

a semiconductor material of a first conductivity type having a first surface and a second surface;

a first doped region of within the semiconductor material and having a second conductivity type;

a gate structure extending into the semiconductor material that is underlying the first region;

a gate conductor of the gate structure;

a gate insulator of the gate structure having a first portion of the gate insulator positioned between the gate conductor and a first portion of the semiconductor material that is external to the first doped region and that underlies the gate conductor wherein the first portion of the semiconductor material is a channel region of the semiconductor device;

a shield conductor of the gate structure overlying the gate conductor; and

a shield insulator having a first portion overlying the shield conductor and electrically insulating the shield conductor from the gate conductor.