Handle substrates of composite substrates for semiconductors

• US 9,469,571 B2
• Filed: 04/29/2015
• Issued: 10/18/2016
• Est. Priority Date: 07/18/2013
• Status: Active Grant

• Current Assignee: NGK Insulators Limited
• Original Assignee: NGK Insulators Limited
• Inventors: Iwasaki, Yasunori, Ide, Akiyoshi, Miyazawa, Sugio
• Primary Examiner(s): ENAD, CHRISTINE A
• Application Number:
  US14/698,994
• Publication Number:
  US 20150232389A1
• Time in Patent Office: 538 Days
• Field of Search: 257/506
• US Class Current: 1/1
• CPC Class Codes: B32B 18/00 Layered products essentially comprising ceramics, e.g. refractory products
• CPC Class Codes: B32B 2250/02 2 layers
• CPC Class Codes: B32B 2305/026 Porous
• CPC Class Codes: B32B 2457/14 Semiconductor wafers
• CPC Class Codes: C04B 2235/3206 Magnesium oxides or oxide-forming salts thereof
• CPC Class Codes: C04B 2235/3217 Aluminum oxide or oxide forming salts thereof, e.g. bauxite, alpha-alumina
• CPC Class Codes: C04B 2235/3225 Yttrium oxide or oxide-forming salts thereof
• CPC Class Codes: C04B 2235/3244 Zirconium oxides, zirconates, hafnium oxides, hafnates, or oxide-forming salts thereof
• CPC Class Codes: C04B 2235/5409 expressed by specific surface values
• CPC Class Codes: C04B 2235/5445 submicron sized, i.e. from 0,1 to 1 micron
• CPC Class Codes: C04B 2235/6025 Tape casting, e.g. with a doctor blade
• CPC Class Codes: C04B 2235/6582 Hydrogen containing atmosphere
• CPC Class Codes: C04B 2235/661 Multi-step sintering
• CPC Class Codes: C04B 2235/662 Annealing after sintering
• CPC Class Codes: C04B 2235/775 Products showing a density-gradient
• CPC Class Codes: C04B 2235/786 Micrometer sized grains, i.e. from 1 to 100 micron
• CPC Class Codes: C04B 2235/963 Surface properties, e.g. surface roughness
• CPC Class Codes: C04B 2237/062 based on silica or silicates
• CPC Class Codes: C04B 2237/30 Composition of layers of ceramic laminates or of ceramic or metallic articles to be joined by heating, e.g. Si substrates
• CPC Class Codes: C04B 2237/343 Alumina or aluminates
• CPC Class Codes: C04B 2237/52 : Pre-treatment of the joining surfaces, e.g. cleaning, machining
• CPC Class Codes: C04B 35/115 : Translucent or transparent products
• CPC Class Codes: C04B 35/44 : based on aluminates
• CPC Class Codes: C04B 35/634 : Polymers C04B35/636 takes precedence
• CPC Class Codes: C04B 37/005 : consisting of glass or ceramic material
• CPC Class Codes: H01L 21/2007 : Bonding of semiconductor wafers to insulating substrates or to semiconducting substrates using an intermediate insulating layer H01L21/2011 takes precedence; bonding of semiconductor wafers to semiconductor wafers for junction formation H01L21/187
• CPC Class Codes: H01L 27/1203 : the substrate comprising an insulating body on a semiconductor body, e.g. SOI three-dimensional layout H01L27/0688

Abstract

A handle substrate 1 is made of a translucent ceramics. An average density of pores having a size of 0.5 to 3.0 μm included in a surface region 2A on the side of a bonding face 1a of the handle substrate 1 is 50 counts/mm² or smaller. It is formed a region 3, whose average density of pores having a size of 0.5 to 3.0 μm is 100 counts/mm² or larger, in the handle substrate 1. The translucent ceramics has an average grain size of 5 to 60 μm.

Claims

1. A handle substrate of a composite substrate for a semiconductor;

said handle substrate comprising a translucent ceramic,

said handle substrate comprising a surface region on a side of a bonding face of said handle substrate, said surface region comprising pores having a size of 0.5 to 3.0 μ

m at an average density of 50 counts/mm² or smaller, and

said handle substrate comprising a region formed therein comprising pores having a size of 0.5 to 3.0 μ

m at an average density of 100 counts/mm² or larger,

wherein said translucent ceramic has an average grain size of 5 to 60 μ

m,

wherein said translucent ceramic has a relative density of 98 percent or higher, and

wherein a ratio of said average density of said pores in said surface region on a side of said bonding face to an average density of said pores in a region through which a central line of said substrate in a direction of thickness passes is 1;

2 to 1;

40.

2. The handle substrate of claim 1, comprising pores having a size of 0.5 to 3.0 μ

m at an average density of 1000 counts/mm² or smaller in said handle substrate.

3. The handle substrate of claim 1, wherein said translucent ceramic comprises polycrystalline alumina.

4. The handle substrate of claim 1, wherein a microscopic central line average surface roughness Ra of said bonding face of said handle substrate is 3.0 nm or smaller, and

wherein an in-line transmittance of a light having a wavelength of 650 nm is 60 percent or lower.

5. A composite substrate for a semiconductor, said composite substrate comprising said handle substrate of claim 1 and a donor substrate bonded to said bonding face of said handle substrate directly or through a bonding region.

6. The composite substrate of claim 5, wherein said donor substrate comprises monocrystalline silicon.

7. A handle substrate of a composite substrate for a semiconductor;

said handle substrate comprising a translucent ceramic,

said handle substrate comprising a surface region on a side of a bonding face of said handle substrate, said surface region comprising pores having a size of 0.5 to 3.0 μ

m at an average density of 50 counts/mm² or smaller, and

said handle substrate comprising a region formed therein comprising pores having a size of 0.5 to 3.0 μ

m at an average density of 100 counts/mm² or larger,

wherein said translucent ceramic has an average grain size of 5 to 60 μ

m,

wherein said translucent ceramic has a relative density of 98 percent or higher,

wherein a microscopic central line average surface roughness Ra of said bonding face of said handle substrate is 3.0 nm or smaller, and

wherein an in-line transmittance of a light having a wavelength of 650 nm is 60 percent or lower.

8. The handle substrate of claim 7, comprising pores having a size of 0.5 to 3.0 μ

m at an average density of 1000 counts/mm² or smaller in said handle substrate.

9. The handle substrate of claim 7, wherein said translucent ceramic comprises polycrystalline alumina.

10. A composite substrate for a semiconductor, said composite substrate comprising said handle substrate of claim 7 and a donor substrate bonded to said bonding face of said handle substrate directly or through a bonding region.

11. The composite substrate of claim 10, wherein said donor substrate comprises monocrystalline silicon.