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Solution composition for passivation layer, thin film transistor array panel, and manufacturing method for thin film transistor array panel

  • US 9,470,978 B2
  • Filed: 10/28/2014
  • Issued: 10/18/2016
  • Est. Priority Date: 10/19/2011
  • Status: Active Grant
First Claim
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1. A method manufacturing a thin film transistor array panel, comprising:

  • forming a thin film transistor including a gate line, a semiconductor layer, a source electrode, and a data line on a substrate;

    coating a solution including an organic siloxane resin represented by Chemical Formula 1;

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