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Service processor patch mechanism

  • US 9,471,133 B2
  • Filed: 05/19/2014
  • Issued: 10/18/2016
  • Est. Priority Date: 08/28/2013
  • Status: Active Grant
First Claim
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1. A microprocessor, comprising:

  • a plurality of processing cores;

    a service processing unit; and

    a memory accessible by both the service processing unit and the plurality of processing cores; and

    wherein at least one of the plurality of processing cores is configured to write a patch to the memory, wherein the patch comprises one or more instructions to be fetched from the memory and executed by the service processing unit after written to the memory by the at least one of the plurality of processing cores.

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