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Magnetic memory having two transistors and two magnetic tunnel junctions per memory cell

  • US 9,472,256 B1
  • Filed: 10/01/2015
  • Issued: 10/18/2016
  • Est. Priority Date: 10/01/2014
  • Status: Active Grant
First Claim
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1. A magnetoresistive memory, comprising:

  • a first memory cell that includes;

    a first select device;

    a first magnetic tunnel junction coupled in series with the first select device;

    a second select device; and

    a second magnetic tunnel junction coupled in series with the second select device, wherein the first memory cell is configured to store a single bit by storing complementary states in the first and second magnetic tunnel junctions;

    a first word line coupled to the first select device;

    a second word line coupled to the second select device; and

    a first circuit configured to generate a first voltage on the first word line and a second voltage on the second word line, wherein the second voltage is greater in magnitude than the first voltage.

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