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Methods and apparatus for multiple memory maps and multiple page caches in tiered memory

  • US 9,478,274 B1
  • Filed: 06/25/2014
  • Issued: 10/25/2016
  • Est. Priority Date: 05/28/2014
  • Status: Active Grant
First Claim
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1. A method, comprising:

  • for an application host with one or more DRAM storage devices and one or more storage class memory (SCM) storage devices configured to communicate with one or more storage arrays via network;

    wherein the one or more storage array comprises at least one SCM storage device,creating a virtual memory address space including dynamically allocated memory, memory mapped files, and disk backed memory, wherein the virtual memory address space is backed by the one or more DRAM and SCM physical storage devices;

    allocating a plurality of user regions in a block device of the one or more SCM storage devices or the storage array, wherein the plurality of user regions is defined in metadata comprising one or more of user region name, location, size, and/or state information;

    accessing a first memory tier constructed by memory mapping a first number of user regions into the virtual address space; and

    accessing a second memory tier constructed by memory mapping a second number of user regions into the virtual address space,wherein page caches are mapped to the first number of user regions and the second number of user regions, wherein at least one of the page caches is shared with multiple ones of the user regions in the first memory tier and the user regions in the second memory tier; and

    wherein each memory mapped user region in the tiered memory is fronted by a DRAM page cache to which an application issues loads and stores, and data are moved between the tiered memory and DRAM page caches on an on-demand page basis.

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