Nonvolatile memory device and method for sensing the same
First Claim
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1. A nonvolatile memory device comprising:
- a first resistive memory cell connected to a first word line;
a second resistive memory cell connected to a second word line that is different from the first word line;
a clamping unit connected between a sensing node and the first resistive memory cell and configured to provide a clamping bias to the first resistive memory cell;
a reference current supplying unit connected to the second resistive memory cell and configured to supply a reference current to the second resistive memory cell;
a sense amplifier connected to the sensing node, the sense amplifier being configured to sense a level change of the sensing node;
a controller configured to perform a sensing operation such that when the first word line is enabled, the second word line is disabled; and
a precharge voltage supplying unit configured to supply a precharge voltage to the first resistive memory cell,wherein the precharge voltage comprises a first precharge voltage and a second precharge voltage, and wherein a time required to provide the second precharge voltage to the first resistive memory cell is longer than a time required to provide the first precharge voltage to the first resistive memory cell.
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Abstract
A nonvolatile memory device includes a first resistive memory cell connected to a first word line, a second resistive memory cell connected to a second word line that is different from the first word line, a clamping unit connected between a sensing node and the first resistive memory cell to provide a clamping bias to the first resistive memory cell, a reference current supplying unit connected to the second resistive memory cell to supply a reference current, and a sense amplifier connected to the sensing node to sense a level change of the sensing node, wherein when the first word line is enabled, the second word line is disabled.
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Citations
14 Claims
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1. A nonvolatile memory device comprising:
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a first resistive memory cell connected to a first word line; a second resistive memory cell connected to a second word line that is different from the first word line; a clamping unit connected between a sensing node and the first resistive memory cell and configured to provide a clamping bias to the first resistive memory cell; a reference current supplying unit connected to the second resistive memory cell and configured to supply a reference current to the second resistive memory cell; a sense amplifier connected to the sensing node, the sense amplifier being configured to sense a level change of the sensing node; a controller configured to perform a sensing operation such that when the first word line is enabled, the second word line is disabled; and a precharge voltage supplying unit configured to supply a precharge voltage to the first resistive memory cell, wherein the precharge voltage comprises a first precharge voltage and a second precharge voltage, and wherein a time required to provide the second precharge voltage to the first resistive memory cell is longer than a time required to provide the first precharge voltage to the first resistive memory cell. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A nonvolatile memory device comprising:
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a first resistive memory cell connected to a first bit line; a second resistive memory cell connected to a second bit line that is complementary to the first bit line; a sensing node connected to the first resistive memory cell; a reference node connected to the second resistive memory cell; a first clamping unit connected to the bit line, and configured to provide a first clamping bias to the first resistive memory cell; a reference current supplying unit connected to the reference node and the second resistive memory cell, and configured to supply a reference current; a sense amplifier connected to the sensing node and the reference node, and configured to compare a sensing level of the sensing node with a reference level of the reference node determined according to operation of the reference current supplying unit; and a precharge voltage supplying unit configured to supply a precharge voltage to the first resistive memory cell, the precharge voltage supplying unit comprising a first sub-precharge voltage supplying unit configured to provide a first precharge voltage to the first resistive memory cell, and a second sub-precharge voltage supplying unit configured to provide a second precharge voltage to the first resistive memory cell, wherein a time required to provide the second precharge voltage to the first resistive memory cell is longer than a time required to provide the first precharge voltage to the first resistive memory cell. - View Dependent Claims (8, 9, 10)
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11. A method of sensing a nonvolatile memory device, comprising:
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connecting a first resistive memory cell to a first word line; connecting a second resistive memory cell to a second word line that is different from the first word line; connecting a clamping unit between a sensing node and the first resistive memory cell to provide a clamping bias to the first resistive memory cell; connecting a reference current supplying unit to the second resistive memory cell to supply a reference current to the second resistive memory cell; connecting a sense amplifier to the sensing node to sense a level change of the sensing node, such that when the first word line is enabled, the second word line is disabled; and supplying a precharge voltage to the first resistive memory cell, wherein the precharge voltage comprises a first precharge voltage and a second precharge voltage, and wherein a time required to provide the second precharge voltage to the first resistive memory cell is longer than a time required to provide the first precharge voltage to the first resistive memory cell. - View Dependent Claims (12, 13, 14)
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Specification