Multi-chip module architecture

• US 9,478,858 B1
• Filed: 03/15/2013
• Issued: 10/25/2016
• Est. Priority Date: 02/28/2013
• Status: Active Grant

• Current Assignee: Rockwell Collins, Inc. (Raytheon Technologies Corporation d/b/a RTX)
• Original Assignee: Rockwell Collins, Inc. (Raytheon Technologies Corporation d/b/a RTX)
• Inventors: Hill, Adrian, West, James B., Paulsen, Lee M., Woodell, Daniel L., Hageman, Michael L., Wyse, Russell D.
• Primary Examiner(s): LIU, HARRY K
• Application Number:
  US13/837,934
• Time in Patent Office: 1,320 Days
• Field of Search: 342/372, 342/70
• US Class Current: 1/1
• CPC Class Codes: G01S 13/5244 Adaptive clutter cancellation specially adapted for airborne MTI, G01S13/5242
• CPC Class Codes: G01S 13/581 using transmission of interrupted pulse modulated waves and based upon the Doppler effect resulting from movement of targets
• CPC Class Codes: G01S 13/953 mounted on aircraft
• CPC Class Codes: G01S 7/292 Extracting wanted echo-signals
• CPC Class Codes: G01S 7/414 Discriminating targets with respect to background clutter
• CPC Class Codes: H01Q 3/34 by electrical means active lenses or reflecting arrays H01Q3/46
• CPC Class Codes: Y02A 90/10 Information and communication technologies [ICT] supporting adaptation to climate change, e.g. for weather forecasting or climate simulation

Abstract

Electronically scanned arrays and multi-chip modules (MCMs) that may be used in such arrays are provided. One MCM may include a set of one or more first semiconductor components and a plurality of second semiconductor components. The first semiconductor component set is coupled to the plurality of second semiconductor components, and the first semiconductor component set is configured to control the plurality of second semiconductor components. Each of the plurality of second semiconductor components is accessible through a plurality of data strings providing communication between the first semiconductor component set and the plurality of second semiconductor components, each data string defining a unique path between the first semiconductor component set and the plurality of second semiconductor components, such that the plurality of data strings provide redundant data paths between the first semiconductor component set and the plurality of second semiconductor components.

Claims

1. A multi-chip module (MCM), comprising:

a first semiconductor component;

a plurality of second semiconductor components, wherein the first semiconductor component is coupled to the plurality of second semiconductor components, and wherein the first semiconductor component is configured to control the plurality of second semiconductor components;

wherein each of the plurality of second semiconductor components is accessible through a plurality of data paths providing communication defined by a plurality of data strings between the first semiconductor component and the plurality of second semiconductor components, each data string defining a unique path for the communication between the first semiconductor component and a unique subset of the plurality of second semiconductor components, such that the plurality of data strings define redundant data paths between the first semiconductor component and each of the plurality of second semiconductor components.

2. The multi-chip module of claim 1, wherein at least one of the first semiconductor component and the plurality of second semiconductor components comprise monolithic microwave integrated circuits (MMICs).

3. The multi-chip module of claim 1, wherein the first semiconductor component comprises at least one of silicon germanium (SiGe), gallium arsenide (GaAs), gallium nitride (GaN), and indium phosphide (InP).

4. The multi-chip module of claim 1,

wherein the first semiconductor component comprises an α

-channel transmit/receive radio frequency integrated circuit (RFIC), where α

is an integer.

6. The multi-chip module of claim 1, wherein each of the plurality of second semiconductor components comprises at least one of a power amplifier, a low noise amplifier, and a transmit/receive (T/R) RFIC.

7. The multi-chip module of claim 1, wherein at least one of the first semiconductor component and the second semiconductor components comprise a T/R RFIC, the T/R RFIC comprising at least one of a T/R switch, a direction coupler, a PIN diode limiter, a power amplifier, and a low noise amplifier.

8. The multi-chip module of claim 1, wherein the plurality of second semiconductor components comprise at least one of silicon germanium (SiGe), gallium arsenide (GaAs), gallium nitride (GaN), and indium phosphide (InP).

9. The multi-chip module of claim 1, wherein each of the plurality of second semiconductor components are accessible through at least three data strings.

10. The multi-chip module of claim 1, wherein each of the plurality of second semiconductor components is a first device in only one data string of the plurality of data strings.

12. The multi-chip module of claim 1, further comprising a thermal management layer configured to remove heat from one or more of the first semiconductor component and the plurality of second semiconductor components, wherein the thermal management layer comprises at least one of an active thermal management component and a passive thermal management component.

13. The multi-chip module of claim 1, wherein the first set of semiconductor component comprises a distributed computing component, wherein the distributed computing component is configured to communicate with a master controller, and wherein the master controller is configured to distribute one or more tasks across a plurality of multi-chip modules with which the master controller is connected.

14. The multi-chip module of claim 1, further comprising an on-chip power supply configured to supply power to the first semiconductor component and the plurality of second semiconductor components.

5. A multi-chip module (MCM), comprising:

a first set of one or more first semiconductor components;

a plurality of second semiconductor components, wherein the first set is coupled to the plurality of second semiconductor components, and wherein the first set is configured to control the plurality of second semiconductor components;

wherein each of the plurality of second semiconductor components is accessible through a plurality of data paths defined by a plurality of data strings for communication between the first set and the plurality of second semiconductor components, each data string defining a unique path between the first set and at least one of the plurality of second semiconductor components for the communication, such that the plurality of data strings define redundant data paths between the first set and each of the plurality of second semiconductor components, wherein the first set comprises an α

-channel transmit/receive radio frequency integrated circuit (RFIC), where α

is an integer, wherein the plurality of second semiconductor components comprise;

β

γ

-channel second semiconductor components, where β

×

γ

=α

, and α

, β

, and γ

are integers.

11. A multi-chip module (MCM), comprising:

a first set of one or more first semiconductor components;

a plurality of second semiconductor components, wherein the first set is coupled to the plurality of second semiconductor components, and wherein the first set is configured to control the plurality of second semiconductor components;

wherein each of the plurality of second semiconductor components is accessible through a plurality of data paths defined by a plurality of data strings for communication between the first set and the plurality of second semiconductor components, each data string defining a unique path between the first set and at least one of the plurality of second semiconductor components for the communication, such that the plurality of data strings define redundant data paths between the first set and each of the plurality of second semiconductor components, wherein the MCM is one of a plurality of MCMs in an electronically scanned array.

15. A subassembly for an electronically scanned array, comprising:

an antenna aperture layer configured to selectively emit and receive radio waves;

a radio frequency (RF) ground layer;

a radio frequency integrated circuit (RFIC) multi-chip module (MCM) attach layer, wherein the RFIC MCM attach layer has attached thereto a plurality of MCMs, each MCM comprising a first set of one or more first semiconductor components and a plurality of second semiconductor components controlled by the first set; and

a thermal layer configured to draw heat away from at least one of the first set and the second semiconductor components, wherein the each of the plurality of second semiconductor components is accessible through a plurality of data paths defined by a plurality of data strings providing communication between the first set and the plurality of second semiconductor components, each data string defining a unique path between the first set and at least one of the plurality of second semiconductor components.

16. The subassembly of claim 15, wherein the thermal layer comprises at least one of:

a thermal spreader, micro fluidic cooling, liquid metal cooling, a two-phased closed loop, and a refrigerant.

17. The subassembly of claim 15, wherein the first set is coupled to the plurality of second semiconductor components, and wherein the first set is configured to control the plurality of second semiconductor components.

18. The subassembly of claim 17, wherein each unique data path comprises a unique subset of the second semiconductor components.

19. The subassembly of claim 15, wherein at least one of the first set and the plurality of second semiconductor components comprise a monolithic microwave integrated circuit (MMIC).

20. The subassembly of claim 15, wherein the first set and the plurality of second semiconductor components comprise at least one of silicon germanium (SiGe), gallium arsenide (GaAs), gallium nitride (GaN), and indium phosphide (InP).

21. The subassembly of claim 15, wherein the MCMs comprise one or more of processing components and data storage components, wherein the processing components and the data storage components are utilized by a master controller of the electronically scanned array to perform tasks of the electronically scanned array and are distributed across the plurality of MCMs.

22. The subassembly of claim 15, further comprising a plurality of data strings connecting each of the plurality of MCMs to a master controller of the electronically scanned array, such that the plurality of data strings provide redundant data paths between the master controller and the plurality of MCMs.

23. An electronically scanned array, comprising:

a master controller; and

a plurality of multi-chip transmit/receive modules, each transmit/receive module comprising;

a first set of one or more first semiconductor components; and

a plurality of second semiconductor components, wherein the first set is coupled to the plurality of second semiconductor components, and wherein the first set is configured to control the plurality of second semiconductor components;

wherein the each of the plurality of second semiconductor components is accessible through a first plurality of data paths providing communication between the first set and the plurality of second semiconductor components defined by a plurality of data strings, each data string of the first plurality of data strings defining a unique path between the first set and at least one of the plurality of second semiconductor components, such that the first plurality of data strings define redundant data paths between the first set and each of the plurality of second semiconductor components, and

wherein each of the transmit/receive modules is accessible by the master controller through a second plurality of data paths defined by a plurality of second data strings providing communication between the master controller and the plurality of transmit/receive modules, each data string of the second plurality of data strings defining a unique path between the master controller and at least one of the plurality of transmit/receive modules, such that the second plurality of data strings provide redundant data paths between the master controller and each of the plurality of transmit/receive modules, wherein the first set comprises an α

-channel transmit/receive radio frequency integrated circuit (RFIC), and wherein the plurality of second semiconductor components comprise β

γ

-channel second semiconductor components, where β

×

γ

=α

, and α

,β

, and γ

are integers.

24. The electronically scanned array of claim 23, wherein one or more of the first semiconductor components and the plurality of second semiconductor components comprise monolithic microwave integrated circuits (MMICs).

25. The electronically scanned array of claim 23, wherein the one or more of the first semiconductor components and the plurality of second semiconductor components comprise at least one of silicon germanium (SiGe), gallium arsenide (GaAs), gallium nitride (GaN), and indium phosphide (InP).

26. The electronically scanned array of claim 23, wherein each unique data path comprises a unique subset of the second semiconductor components.

27. The electronically scanned array of claim 23, wherein each of the plurality of second semiconductor components comprises at least one of a power amplifier, a low noise amplifier, and a transmit/receive (T/R) RFIC.

28. The electronically scanned array of claim 23, wherein at least one of the first semiconductor component and the second semiconductor component comprise a T/R RFIC, the T/R RFIC comprising at least one of a T/R switch, a directional coupler, a PIN diode limiter, a power amplifier, and a low noise amplifier.

29. The electronically scanned array of claim 23, wherein each of the plurality of second semiconductor components is accessible through at least three data strings.

31. The electronically scanned array of claim 23, wherein the plurality of multi-chip transmit/receive modules comprise one or more of processing components and data storage components, wherein the processing components and the data storage components are utilized by a master controller to perform tasks of the electronically scanned array are distributed across the plurality of multi-chip transmit/receive modules.

32. The electronically scanned array of claim 23, wherein at least one of control elements and storage elements of a set of beam coefficients is distributed across two or more of the multi-chip transmit/receive modules.

30. An electronically scanned array, comprising:

a master controller; and

a plurality of multi-chip transmit/receive modules, each transmit/receive module comprising;

a first set of one or more first semiconductor components; and

a plurality of second semiconductor components, wherein the first set is coupled to the plurality of second semiconductor components, and wherein the first set is configured to control the plurality of second semiconductor components;

wherein the each of the plurality of second semiconductor components is accessible through a first plurality of data paths defined by a plurality of data strings for communication between the first set and the plurality of second semiconductor components, each data string of the first plurality of data strings defining a unique path between the first set and at least one of the plurality of second semiconductor components, such that the first plurality of data strings define redundant data paths between the first set and each of the plurality of second semiconductor components, and

wherein each of the transmit/receive modules is accessible by the master controller through a second plurality of data paths defined by a plurality of second data strings providing communication between the master controller and the plurality of transmit/receive modules, each data string of the second plurality of data strings defining a unique path between the master controller and the plurality of transmit/receive modules, such that the second plurality of data strings define redundant data paths between the master controller and the plurality of transmit/receive modules, wherein the first set comprises an α

-channel transmit/receive radio frequency integrated circuit (RFIC), and wherein each of the plurality of second semiconductor components is a first device with respect to the first set in only one data path defined by the first plurality of data strings.