Buck/boost circuit that charges and discharges multi-cell batteries of a power bank device
First Claim
1. A power bank circuit comprising:
- a voltage input (VIN) terminal;
a voltage output (VOUT) terminal;
at least one rechargeable battery, wherein the at least one rechargeable battery has an operating voltage range from a fully uncharged operating voltage VBATL to a fully charged operating voltage VBATH, wherein the operating voltage range is between a ground (GND) node and a battery (VBAT) node;
a first field effect transistor S1 coupled to switch current between the VBAT node and a switch (SW) node;
a second field effect transistor S2 coupled to switch current between the SW node and the GND node;
an inductor coupled to conduct current between the SW node and a voltage output (VOUT) node;
a capacitor having a first lead coupled to the VOUT node and a second lead coupled to the GND node;
a third field effect transistor SA having a first terminal, a second terminal and a third terminal, wherein the first terminal of transistor SA is coupled to a voltage input (VIN) node;
a fourth field effect transistor SB having a first terminal, a second terminal and a third terminal, wherein the first terminal of transistor SB is coupled to the second terminal of transistor SA, and wherein the second terminal of transistor SB is coupled to the VOUT node; and
a control circuit that controls the transistor S1, the transistor S2, the transistor SA and the transistor SB such that;
1) in a charging boost mode transistors SA and SB are turned on and transistors S1 and S2 are pulse-width modulated on and off so that current flows into the power bank circuit via the VIN terminal, through the VIN node, through the transistor SA and through the transistor SB to the VOUT node, and so that an average current flows in the inductor from the VOUT node to the SW node and so that a charging current flows through the transistor S1 and through the VBAT node and to the at least one rechargeable battery so as to charge the at least one rechargeable battery, wherein in the charging boost mode the voltage on the VIN node is always smaller than the VBATL voltage, and wherein in the charging boost mode a current also flows from the VOUT node and through the VOUT terminal and out of the power bank circuit;
2) in a discharging buck mode transistors SA and SA are turned off and transistors S1 and S2 are pulse-width modulated on and off so that current flows out of the at least one rechargeable battery, through the VBAT node, through the transistor S1 to the SW node, and through the inductor to the VOUT node, and out of the power bank circuit via the VOUT terminal, wherein in the discharging buck mode the voltage on the VBAT node is always higher than the voltage on the VOUT terminal.
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Accused Products
Abstract
A power bank device has a single circuit topology involving a DC-to-DC converter and four transistors so that this single topology can be used both to charge battery cells with a regulated current in a charging step-up boost mode and to drive a regulated voltage onto a power bank voltage output node in a discharging step-down buck mode. In one example, the circuit includes a first transistor coupled to conduct current between a battery voltage node and a switch node SW, a second transistor coupled to conduct current between the SW node and a ground node, and third and fourth transistors coupled in series to conduct current between a voltage input node and the voltage output node. The inductor of the converter is coupled between the SW node and the voltage output node, and the output capacitor of the converter is coupled between the voltage output node and the ground node.
16 Citations
20 Claims
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1. A power bank circuit comprising:
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a voltage input (VIN) terminal; a voltage output (VOUT) terminal; at least one rechargeable battery, wherein the at least one rechargeable battery has an operating voltage range from a fully uncharged operating voltage VBATL to a fully charged operating voltage VBATH, wherein the operating voltage range is between a ground (GND) node and a battery (VBAT) node; a first field effect transistor S1 coupled to switch current between the VBAT node and a switch (SW) node; a second field effect transistor S2 coupled to switch current between the SW node and the GND node; an inductor coupled to conduct current between the SW node and a voltage output (VOUT) node; a capacitor having a first lead coupled to the VOUT node and a second lead coupled to the GND node; a third field effect transistor SA having a first terminal, a second terminal and a third terminal, wherein the first terminal of transistor SA is coupled to a voltage input (VIN) node; a fourth field effect transistor SB having a first terminal, a second terminal and a third terminal, wherein the first terminal of transistor SB is coupled to the second terminal of transistor SA, and wherein the second terminal of transistor SB is coupled to the VOUT node; and a control circuit that controls the transistor S1, the transistor S2, the transistor SA and the transistor SB such that;
1) in a charging boost mode transistors SA and SB are turned on and transistors S1 and S2 are pulse-width modulated on and off so that current flows into the power bank circuit via the VIN terminal, through the VIN node, through the transistor SA and through the transistor SB to the VOUT node, and so that an average current flows in the inductor from the VOUT node to the SW node and so that a charging current flows through the transistor S1 and through the VBAT node and to the at least one rechargeable battery so as to charge the at least one rechargeable battery, wherein in the charging boost mode the voltage on the VIN node is always smaller than the VBATL voltage, and wherein in the charging boost mode a current also flows from the VOUT node and through the VOUT terminal and out of the power bank circuit;
2) in a discharging buck mode transistors SA and SA are turned off and transistors S1 and S2 are pulse-width modulated on and off so that current flows out of the at least one rechargeable battery, through the VBAT node, through the transistor S1 to the SW node, and through the inductor to the VOUT node, and out of the power bank circuit via the VOUT terminal, wherein in the discharging buck mode the voltage on the VBAT node is always higher than the voltage on the VOUT terminal. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13)
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14. A method comprising:
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(a) in a discharging mode receiving a supply current from at least one battery via a battery voltage (VBAT) terminal of an integrated circuit and switching current through a switch (SW) terminal of the integrated circuit and through an external inductor external to the integrated circuit such that a regulated output voltage VOUT is present on an output node VOUT, wherein the inductor is coupled between the switch (SW) terminal of the integrated circuit and the output node VOUT, wherein a voltage on the VBAT terminal during operation in the discharging mode is greater than the regulated output voltage VOUT, and wherein during operation in the discharging mode the integrated circuit and the external inductor operate as a buck DC-to-DC switching converter; and (b) in a charging mode receiving a supply current onto an input voltage (VIN) terminal of the integrated circuit and causing a current to flow through the external inductor such that a current-regulated charging current flows out of the VBAT terminal of the integrated circuit and into said at least one battery, wherein during operation in the charging mode a voltage on the VIN terminal is smaller than a voltage on the VBAT terminal, wherein during operation in the charging mode the integrated circuit and the external inductor operate as a boost DC-to-DC switching converter, wherein during operation in the charging mode a current flows from the VIN terminal, through a bypass current path within the integrated circuit, and out of a voltage output (VOUT) terminal of the integrated circuit, and wherein the VOUT terminal of the integrated circuit is coupled to the VOUT output node. - View Dependent Claims (15, 16, 17, 18)
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19. A power bank circuit comprising:
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a voltage input (VIN) terminal; a voltage output (VOUT) terminal; at least one rechargeable battery, wherein the at least one rechargeable battery has an operating voltage range from a fully uncharged operating voltage VBATL to a fully charged operating voltage VBATH, wherein the operating voltage range is between a ground (GND) node and a battery (VBAT) node; a first field effect transistor S1 coupled to switch current between the VBAT node and a switch (SW) node; a second field effect transistor S2 coupled to switch current between the SW node and the GND node; an inductor coupled to conduct current between the SW node and a voltage output (VOUT) node; a capacitor having a first lead coupled to the VOUT node and a second lead coupled to the GND node; a third field effect transistor SA having a first terminal, a second terminal and a third terminal, wherein the first terminal of transistor SA is coupled to a voltage input (VIN) node; a fourth field effect transistor SB having a first terminal, a second terminal and a third terminal, wherein the first terminal of transistor SB is coupled to the second terminal of transistor SA, and wherein the second terminal of transistor SB is coupled to the VOUT node; and means for controlling the transistor S1, the transistor S2, the transistor SA and the transistor SB such that;
1) in a charging boost mode transistors SA and SB are turned on and transistors S1 and S2 are pulse-width modulated on and off so that current flows into the power bank circuit via the VIN terminal, through the VIN node, through the transistor SA and through the transistor SB to the VOUT node, and so that an average current flows in the inductor from the VOUT node to the SW node and so that a charging current flows through the transistor S1 and through the VBAT node and to the at least one rechargeable battery so as to charge the at least one rechargeable battery, wherein in the charging boost mode the voltage on the VIN node is always smaller than the VBATL voltage, and wherein in the charging boost mode a current also flows from the VOUT node and through the VOUT terminal and out of the power bank circuit;
2) in a discharging buck mode transistors SA and SA are turned off and transistors S1 and S2 are pulse-width modulated on and off so that current flows out of the at least one rechargeable battery, through the VBAT node, through the transistor S1 to the SW node, and through the inductor to the VOUT node, and out of the power bank circuit via the VOUT terminal, and wherein in the discharging buck mode the voltage on the VBAT node is always higher than the voltage on the VOUT terminal. - View Dependent Claims (20)
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Specification