Display device and electronic device with improved driver circuit

• US 9,482,919 B2
• Filed: 02/20/2014
• Issued: 11/01/2016
• Est. Priority Date: 02/25/2013
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Shishido, Hideaki, Miyake, Hiroyuki, Inoue, Seiko, Toyotaka, Kouhei, Kusunoki, Koji
• Primary Examiner(s): Dulka, John P
• Assistant Examiner(s): Peters, Charles R
• Application Number:
  US14/184,996
• Publication Number:
  US 20140240631A1
• Time in Patent Office: 985 Days
• Field of Search: 349/50, 349/43
• US Class Current: 1/1
• CPC Class Codes: G02F 1/136204 Arrangements to prevent high voltage or static electricity failures
• CPC Class Codes: G02F 1/136286 Wiring, e.g. gate line, drain line
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 29/66 Types of semiconductor device ; Multistep manufacturing processes therefor

Abstract

Transistors each include a gate electrode, a gate insulating layer over the gate electrode, an oxide semiconductor layer over the gate insulating layer, and a source electrode and a drain electrode over the oxide semiconductor layer. A driver circuit portion includes first to third wirings formed in the same step as the gate electrode, fourth to sixth wirings formed in the same step as the source electrode and the drain electrode, a seventh wiring formed in the same step as a pixel electrode, a first region where the second wiring intersects with the fifth wiring, and a second region where the third wiring intersects with the sixth wiring. The first wiring is connected to the fourth wiring through the seventh wiring. A distance between the wirings in the second region is longer than that in the first region.

Claims

1. A display device comprising:

a pixel portion comprising a pixel electrode and a transistor; and

a driver circuit portion comprising a first region and a second region,

wherein the transistor comprises a first semiconductor layer and an insulating layer on the first semiconductor layer,

wherein the first region comprises a first wiring and a second wiring intersecting with the first wiring,

wherein the second region comprises a third wiring and a fourth wiring intersecting with the third wiring,

wherein the second region further comprises a second semiconductor layer and the insulating layer,

wherein the first wiring and the third wiring are provided in the same layer as a gate electrode of the transistor,

wherein the second semiconductor layer is provided in the same layer as the first semiconductor layer,

wherein the insulating layer is between the first wiring and the second wiring in the first region,

wherein the insulating layer and the second semiconductor layer are between the third wiring and the fourth wiring in the second region, and

wherein the first wiring has a comb-like shape.

2. The display device according to claim 1, wherein the first semiconductor layer is an oxide semiconductor layer.

3. The display device according to claim 2, wherein the oxide semiconductor layer comprises indium and zinc.

4. The display device according to claim 2,

wherein the oxide semiconductor layer comprises a crystal, and

wherein a c-axis of the crystal is aligned in a direction parallel to a normal vector of a surface of the oxide semiconductor layer.

5. The display device according to claim 2, wherein the oxide semiconductor layer comprises a nanocrystal.

6. The display device according to claim 1,

wherein the driver circuit portion further comprises a third region,

wherein the third region comprises a fifth wiring and a sixth wiring electrically connected to the fifth wiring through a seventh wiring,

wherein the fifth wiring is provided in the same layer as the gate electrode of the transistor,

wherein the sixth wiring is provided in the same layer as a source electrode and a drain electrode of the transistor, and

wherein the seventh wiring is provided in the same layer as the pixel electrode.

7. An electronic device comprising the display device according to claim 1.

8. A display device comprising:

a pixel portion comprising a pixel electrode and a transistor; and

a driver circuit portion comprising a first region and a second region,

wherein the transistor comprises a first oxide semiconductor layer and an insulating layer on the first oxide semiconductor layer,

wherein the first region comprises a first wiring and a second wiring intersecting with the first wiring,

wherein the second region comprises a third wiring and a fourth wiring intersecting with the third wiring,

wherein the second region further comprises a second oxide semiconductor layer and the insulating layer,

wherein the first wiring and the third wiring are provided in the same layer as a gate electrode of the transistor,

wherein the second wiring and the fourth wiring are provided in the same layer as a source electrode and a drain electrode of the transistor,

wherein the second oxide semiconductor layer is provided in the same layer as the first oxide semiconductor layer,

wherein the insulating layer is between the first wiring and the second wiring in the first region,

wherein the insulating layer and the second oxide semiconductor layer are between the third wiring and the fourth wiring in the second region, and

wherein the first wiring has a comb-like shape.

9. The display device according to claim 8, wherein the first oxide semiconductor layer comprises indium and zinc.

10. The display device according to claim 8,

wherein the first oxide semiconductor layer comprises a crystal, and

wherein a c-axis of the crystal is aligned in a direction parallel to a normal vector of a surface of the first oxide semiconductor layer.

11. The display device according to claim 8,

wherein the driver circuit portion further comprises a third region,

wherein the third region comprises a fifth wiring and a sixth wiring electrically connected to the fifth wiring through a seventh wiring,

wherein the fifth wiring is provided in the same layer as the gate electrode of the transistor,

wherein the sixth wiring is provided in the same layer as the source electrode and the drain electrode, and

wherein the seventh wiring is provided in the same layer as the pixel electrode.

12. An electronic device comprising the display device according to claim 8.

13. The display device according to claim 8, wherein the first oxide semiconductor layer comprises a nanocrystal.

14. A display device comprising:

a pixel portion comprising a pixel electrode and a transistor; and

a driver circuit portion comprising a first region, a second region, and a third region,

wherein the transistor comprises a first semiconductor layer and an insulating layer on the first semiconductor layer,

wherein the first region comprises a first wiring and a second wiring intersecting with the first wiring,

wherein the second region comprises a third wiring and a fourth wiring intersecting with the third wiring,

wherein the second region further comprises a second semiconductor layer and the insulating layer,

wherein the first wiring and the third wiring are provided in the same layer as a gate electrode of the transistor,

wherein the second semiconductor layer is provided in the same layer as the first semiconductor layer,

wherein the insulating layer is between the first wiring and the second wiring in the first region,

wherein the insulating layer and the second semiconductor layer are between the third wiring and the fourth wiring in the second region,

wherein the third region comprises a fifth wiring and a sixth wiring electrically connected to the fifth wiring through a seventh wiring,

wherein the fifth wiring is provided in the same layer as the gate electrode of the transistor,

wherein the sixth wiring is provided in the same layer as a source electrode and a drain electrode of the transistor, and

wherein the seventh wiring is provided in the same layer as the pixel electrode.

15. The display device according to claim 14, wherein the first semiconductor layer is an oxide semiconductor layer.

16. The display device according to claim 15, wherein the oxide semiconductor layer comprises indium and zinc.

17. The display device according to claim 15,

wherein the oxide semiconductor layer comprises a crystal, and

wherein a c-axis of the crystal is aligned in a direction parallel to a normal vector of a surface of the oxide semiconductor layer.

18. The display device according to claim 15, wherein the oxide semiconductor layer comprises a nanocrystal.

19. An electronic device comprising the display device according to claim 14.

20. A display device comprising:

a pixel portion comprising a pixel electrode and a transistor; and

a driver circuit portion comprising a first region, a second region, and a third region,

wherein the transistor comprises a first oxide semiconductor layer and an insulating layer on the first oxide semiconductor layer,

wherein the first region comprises a first wiring and a second wiring intersecting with the first wiring,

wherein the second region comprises a third wiring and a fourth wiring intersecting with the third wiring,

wherein the second region further comprises a second oxide semiconductor layer and the insulating layer,

wherein the first wiring and the third wiring are provided in the same layer as a gate electrode of the transistor,

wherein the second wiring and the fourth wiring are provided in the same layer as a source electrode and a drain electrode of the transistor,

wherein the second oxide semiconductor layer is provided in the same layer as the first oxide semiconductor layer,

wherein the insulating layer is between the first wiring and the second wiring in the first region,

wherein the insulating layer and the second oxide semiconductor layer are between the third wiring and the fourth wiring in the second region,

wherein the third region comprises a fifth wiring and a sixth wiring electrically connected to the fifth wiring through a seventh wiring,

wherein the fifth wiring is provided in the same layer as the gate electrode of the transistor,

wherein the sixth wiring is provided in the same layer as the source electrode and the drain electrode, and

wherein the seventh wiring is provided in the same layer as the pixel electrode.

21. The display device according to claim 20, wherein the first oxide semiconductor layer comprises indium and zinc.

22. The display device according to claim 20,

wherein the first oxide semiconductor layer comprises a crystal, and

wherein a c-axis of the crystal is aligned in a direction parallel to a normal vector of a surface of the first oxide semiconductor layer.

23. An electronic device comprising the display device according to claim 22.

24. The display device according to claim 20, wherein the first oxide semiconductor layer comprises a nanocrystal.