Data synchronization method and apparatus

• US 9,483,382 B2
• Filed: 12/30/2013
• Issued: 11/01/2016
• Est. Priority Date: 08/22/2011
• Status: Active Grant

• Current Assignee: Huawei Technologies Co., Ltd. (Huawei Investment & Holding Co., Ltd.)
• Original Assignee: Huawei Technologies Co., Ltd. (Huawei Investment & Holding Co., Ltd.)
• Inventors: Wang, Zhenguo
• Primary Examiner(s): Manoskey, Joseph D
• Application Number:
  US14/143,143
• Publication Number:
  US 20140122934A1
• Time in Patent Office: 1,037 Days
• Field of Search: 714/35, 714/25, 714/34, 714/38.1, 714/38.13, 714/41, 714/47.1
• US Class Current: 1/1
• CPC Class Codes: G06F 11/079 Root cause analysis, i.e. error or fault diagnosis in a hardware test environment G06F11/22; in a software test environment G06F11/36
• CPC Class Codes: G06F 11/36 Preventing errors by testing or debugging software
• CPC Class Codes: G06F 11/3636 by tracing the execution of the program
• CPC Class Codes: G06F 12/0815 Cache consistency protocols
• CPC Class Codes: G06F 8/65 Updates security arrangements therefor G06F21/57
• CPC Class Codes: G06F 9/30087 Synchronisation or serialisation instructions
• CPC Class Codes: G06F 9/30145 Instruction analysis, e.g. decoding, instruction word fields
• CPC Class Codes: G06F 9/45558 Hypervisor-specific management and integration aspects

Abstract

Embodiments of the present invention provide a data synchronization method and apparatus. The method includes: scanning a code to capture a synchronization instruction; replacing the captured synchronization instruction with a trap instruction; and when the code runs to the trap instruction, trapping a code execution right into a distributed shared memory (DSM) unit, where the DSM unit implements a concurrent multi-write protocol, but implements a single-write protocol when executing the synchronization instruction, thereby supporting the concurrent multi-write protocol and solving the synchronization problem caused by the concurrent multi-write protocol.

Claims

1. A data synchronization method, comprising:

scanning, by a code scanning unit, a code to capture a synchronization instruction, wherein the synchronization instruction is a memory barrier instruction;

replacing, by the code scanning unit, the captured synchronization instruction with a trap instruction;

obtaining, by a distributed shared memory (DSM) unit, a code execution right when the code runs to the trap instruction;

implementing, by the DSM unit, a concurrent multi-write protocol;

implementing, by the DSM unit, a single-write protocol when executing the synchronization instruction; and

returning, by the DSM unit, the code execution right after all data update operations are completed.

2. The method according to claim 1, wherein before the code runs to the trap instruction, the method further comprises:

scanning, by the code scanning unit, the code to capture a flow change instruction; and

replacing the flow change instruction with the trap instruction.

3. The method according to claim 2, further comprising:

determining, by the DSM unit, whether a target page to which a flow change is directed is a scanned page when executing the flow change instruction;

executing the flow change to a corresponding code on the scanned page when the target page to which the flow change is directed is the scanned page, and executing the corresponding code; and

executing, for an unscanned page when the target page to which the flow change is directed is the unscanned page, the process of scanning the code to capture the synchronization instruction and the process of replacing the captured synchronization instruction with the trap instruction.

4. The method according to claim 1, further comprising obtaining, by the DSM unit, the code execution right when a page fault occurs in a running process of the code.

5. The method according to claim 4, further comprising:

generating, by the DSM unit, a copy of data to which a read operation is directed when the page fault is caused by the read operation, and causing other nodes to set corresponding copies on the other nodes to read-only;

requesting, by the DSM unit, a cache, and writing data to the cache when the page fault is caused by a write operation and a page to which the write operation is directed does not exist; and

updating, by the DSM unit, data, and broadcasting the updated data and updated global time to the other nodes such that the other nodes update corresponding data according to the global time when the page fault is caused by the write operation and a page to which the write operation is directed exists.

6. The method according to claim 1, wherein the concurrent multi-write protocol is a write-update protocol.

7. A data synchronization apparatus, comprising:

a memory storing executable instructions; and

processor coupled to the memory, wherein the executable instructions cause the processor to;

scan a code to capture a synchronization instruction, wherein the synchronization instruction is a memory barrier instruction;

replace the captured synchronization instruction with a trap instruction;

obtain a code execution right when the code runs to the trap instruction;

implement a concurrent multi-write protocol;

implement a single-write protocol when executing the synchronization instruction; and

return the code execution right after all data update operations are completed.

8. The apparatus according to claim 7, wherein the processor is further configured to:

scan the code to capture a flow change instruction; and

replace the flow change instruction with the trap instruction.

9. The apparatus according to claim 8, wherein the processor is further configured to:

determine whether a target page to which a flow change is directed is a scanned page when executing the flow change instruction;

execute the flow change to a corresponding code on the scanned page when the target page to which the flow change is directed is the scanned page, and execute the corresponding code; and

execute, for an unscanned page when the target page to which the flow change is directed is the unscanned page, the process of scanning the code to capture the synchronization instruction and the process of replacing the captured synchronization instruction with the trap instruction.

10. The apparatus according to claim 7, wherein the processor is further configured to obtain the code execution right when a page fault occurs in a running process of the code.

11. The apparatus according to claim 10, wherein the processor is further configured to:

generate a copy of data to which a read operation is directed when the page fault is caused by the read operation, and cause other nodes to set corresponding copies on the other nodes to read-only;

request a cache, and write data to the cache when the page fault is caused by a write operation and a page to which the write operation is directed does not exist; and

update data when the page fault is caused by the write operation and the page to which the write opera directed exists, and broadcast the updated data and updated global time to the other nodes such that the other nodes update corresponding data according to the global time.

12. The apparatus according to claim 7, wherein the apparatus operates in an operating system or an application program or is comprised in an operating system.

13. The apparatus according to claim 7, wherein the concurrent multi-write protocol is a write-update protocol.

14. A data processing system, comprising:

an operating system comprising a data synchronization apparatus,

wherein the data synchronization apparatus comprises;

a memory storing executable instructions; and

a processor coupled to the memory, wherein the executable instructions cause the processor to;

scan a code to capture a synchronization instruction, wherein the synchronization instruction is a memory barrier instruction; and

replace the captured synchronization instruction with a trap instruction;

obtain a code execution right when the code runs to the trap instruction;

implement a concurrent multi-write protocol;

implement a single-write protocol when executing the synchronization instruction; and

return the code execution right after all data update operations are completed.

15. A data synchronization method, comprising:

scanning, by a code scanning unit, a code to capture a synchronization instruction;

replacing, by the code scanning unit, the captured synchronization instruction with a trap instruction;

scanning;

by the code scanning unit, the code to capture a flow change instruction;

replacing the flow change instruction with the trap instruction;

obtaining, by a distributed shared memory (DSM) unit, a code execution right when the code runs to the trap instruction;

implementing, by the DSM unit, a concurrent multi-write protocol;

implementing, by the DSM unit, a single-write protocol when executing the synchronization instruction;

determining, by the DSM unit, whether a target page to which a flow change is directed is a scanned page when executing the flow change instruction;

executing the flow change to a corresponding code on the scanned page when the target page to which the flow change is directed is the scanned page, and executing the corresponding code; and

executing, for an unscanned page when the target page to which the flow change is directed is the unscanned page, the process of scanning the code to capture the synchronization instruction and the process of replacing the captured synchronization instruction with the trap instruction.

16. A data synchronization method, comprising:

scanning, by a code scanning unit, a code to capture a synchronization instruction, wherein the synchronization instruction is an atomic operation instruction;

replacing, by the code scanning unit, the captured synchronization instruction with a trap instruction;

obtaining, by a distributed shared memory (DSM unit, a code execution right when the code runs to the trap instruction;

implementing, by the DSM unit, a concurrent multi-write protocol;

implementing, by the DSM unit, a single-write protocol when executing the synchronization instruction, wherein implementing, by the DSM unit, the single-write protocol when executing the synchronization instruction comprises;

broadcasting a notification to other nodes such that the other nodes set corresponding data to read-only and forbid synchronization operations for the corresponding data; and

broadcasting updated data to the other nodes after execution of the atomic operation instruction is completed such that the other nodes update the corresponding data and allow synchronization operations for the corresponding data.

17. A data synchronization method, comprising:

scanning, by a code scanning nit, a code to capture a synchronization instruction;

replacing, by the code scanning unit, the captured synchronization instruction with a trap instruction;

obtaining, by a distributed shared memory (DSM) unit, a code execution right when the code runs to the trap instruction;

implementing, by the DSM unit, a concurrent multi-write protocol;

implementing, by the DSM unit, a single-write protocol when executing the synchronization instruction;

obtaining, by the DSM unit, the code execution right when a page fault occurs in a running process of the code;

generating, by the DSM unit, a copy of data to which a read operation is directed when the page fault is caused by the read operation, and causing other nodes to set corresponding copies on the other nodes to read-only;

requesting, by the DSM unit, a cache, and writing data to the cache when the page fault is caused by a write operation and a page to which the write operation is directed does not exist; and

updating, by the DSM unit, data, and broadcasting the updated data and updated global time to the other nodes such that the other nodes update corresponding data according to the global time when the page fault is caused by the write operation and a page to which the write operation is directed exists.

18. A data synchronization apparatus, comprising:

a memory storing executable instructions; and

a processor coupled to the memory, wherein the executable instructions cause the processor to;

scan a code to capture a synchronization instruction;

replace the captured synchronization instruction with a trap instruction;

scan the code to capture a flow change instruction;

replace the flow change instruction with the trap instruction

obtain a code execution right when the code runs to the trap instruction;

implement a concurrent multi-write protocol;

implement a single-write protocol when executing the synchronization instruction;

determine whether a target page to which a flow change is directed is a scanned page when executing the flow change instruction;

execute the flow change to a corresponding code on the scanned page when the target page to which the flow change is directed is the scanned page, and execute the corresponding code; and

execute, for an unscanned page when the target page to which the flow change is directed is the unscanned page, the process of scanning the code to capture the synchronization instruction and the process of replacing the captured synchronization instruction with the trap instruction.

19. A data synchronization apparatus, comprising:

a memory storing executable instructions; and

a processor coupled to the memory, wherein the executable instructions cause the processor to;

scan a code to capture a synchronization instruction, wherein the synchronization instruction is an atomic operation instruction;

replace the captured synchronization instruction with a trap instruction;

obtain a code execution right when the code runs to the trap instruction;

implement a concurrent multi-write protocol;

implement a single-write protocol when executing the synchronization instruction;

broadcast a notification to other nodes such that the other nodes set corresponding data to read-only and forbid synchronization operations for the corresponding data; and

broadcast updated data to the other nodes after execution of the atomic operation instruction is completed such that the other nodes update the corresponding data and allow synchronization operations for the corresponding data.

20. A data synchronization apparatus, comprising:

a memory storing executable instructions; and

a processor coupled to the memory, wherein the executable instructions cause the processor to;

scan a code to capture a synchronization instruction;

replace the captured synchronization instruction with a trap instruction;

obtain a code execution right when the code runs to the trap instruction;

implement a concurrent multi-write protocol;

implement a single-write protocol when executing the synchronization instruction;

obtain the code execution right when a page fault occurs in a running process of the code;

generate a copy of data to which a read operation is directed when the page fault is caused by the read operation, and cause other nodes to set corresponding copies on the other nodes to read-only;

request a cache, and write data to the cache when the page fault is caused by a write operation and a page to which the write operation is directed does not exist; and

update data when the page fault is caused by the write operation and the page to which the write operation is directed exists, and broadcast the updated data and updated global time to the other nodes such that the other nodes update corresponding data according to the global time.