Device and method for adaptive digital pre-distortion

• US 9,484,962 B1
• Filed: 06/05/2015
• Issued: 11/01/2016
• Est. Priority Date: 06/05/2015
• Status: Active Grant

• Current Assignee: Infineon Technologies AG
• Original Assignee: Infineon Technologies AG
• Inventors: Magesacher, Thomas, Singerl, Peter, Mataln, Martin
• Primary Examiner(s): Bayard, Emmanuel
• Application Number:
  US14/731,586
• Time in Patent Office: 515 Days
• Field of Search: 375295-297
• US Class Current: 1/1
• CPC Class Codes: H03F 1/3241 using predistortion circuits H03F1/3211, H03F1/3217 take precedence
• CPC Class Codes: H04B 1/0475 with means for limiting noise, interference or distortion H04B1/0483 takes precedence
• CPC Class Codes: H04B 2001/0425 with linearisation using predistortion

Abstract

One embodiment relates to a system which includes a pre-distortion unit, a power amplifier circuit, a power amplifier model, and a parameter estimation unit. The pre-distortion unit is configured to pre-distort an input signal based on a model parameter by directly computing the model inverse in an iterative fashion, thereby providing a pre-distorted signal. The power amplifier circuit is configured to amplify the pre-distorted signal. The power amplifier model is configured to model amplification of the pre-distorted signal by the power amplifier circuit based on the pre-distorted signal and the model parameter. Based on the pre-distorted signal and an error signal, the parameter estimation unit is configured to update the model parameter provided to the pre-distortion unit and the power amplifier model. The error signal represents a difference between an output signal from the power amplifier circuit and a modeled output signal from the power amplifier model.

Claims

1. A system, comprising:

a pre-distortion unit configured to pre-distort an input signal based on a model parameter by directly computing an inverse of a power amplifier model in an iterative fashion and configured to alternate between computing the inverse and updating the model parameter, thereby providing a pre-distorted signal, wherein the pre-distortion unit calculates the pre-distorted signal according to the following function;

2. The system of claim 1, wherein the parameter estimation unit is arranged on a feedback path which couples an output of the power amplifier circuit to both an input of the pre-distortion unit and an input of the power amplifier model.

3. The system of claim 2, further comprising:

a comparator arranged on the feedback path and having a first comparator input coupled to the output of the power amplifier circuit, a second comparator input coupled to an output of the power amplifier model, and a comparator output to provide the error signal to an input of the parameter estimation unit.

4. The system of claim 1, wherein the input signal is a complex digital baseband signal.

5. The system of claim 1:

wherein an amplification characteristic of the power amplifier circuit changes in non-linear fashion due to changes in a magnitude of the input signal; and

wherein the error signal changes the model parameter to keep a magnitude of the output signal provided at an output of the power amplifier circuit substantially linear with respect to the magnitude of the input signal.

6. The system of claim 1, wherein the model parameter is provided directly to the pre-distortion unit and directly to the power amplifier model from the parameter estimation unit.

7. The system of claim 1, further comprising:

a unit that provides a set of amplitude segments, which adjoin one another at amplitude-segment boundaries, to the system;

wherein the model parameter is updated for each amplitude segment, and wherein the pre-distortion unit and power amplifier model use polynomials within the amplitude segments where the polynomial order can vary from amplitude segment to amplitude segment depending on the behavior of the amplifier.

8. The system of claim 1, wherein the pre-distortion unit calculates the pre-distorted signal according to a sum of memory polynomials and memoryless polynomials which are tuned based on the model parameter.

9. The system of claim 8, wherein the memoryless polynomials are calculated using a first clock having a first clock frequency and wherein the memory polynomials are calculated using a second clock having a second clock frequency, the first clock frequency being greater than the second clock frequency.

10. A system, comprising:

a pre-distortion unit configured to pre-distort an input signal based on a model parameter, thereby providing a pre-distorted signal, wherein the pre-distortion unit calculates the pre-distorted signal according to a sum of memory polynomials and memoryless polynomials which are tuned based on the model parameter, wherein the memoryless polynomials are calculated using a first clock having a first clock frequency and wherein the memory polynomials are calculated using a second clock having a second clock frequency, the first clock frequency being greater than the second clock frequency;

a frequency up-conversion element to up-convert a frequency of the pre-distorted signal, thereby providing an up-converted pre-distorted signal;

a power amplifier circuit configured to amplify the up-converted pre-distorted signal, thereby providing an up-converted output signal;

a power amplifier model configured to model the amplification of the up-converted pre-distorted signal by the power amplifier based on the pre-distorted signal and the model parameter; and

a feedback path coupling an output of the power amplifier circuit to the pre-distortion unit and power amplifier model, wherein the feedback path comprises;

a down-conversion element to down-convert the up-converted output signal, thereby providing a down-converted output signal;

wherein the feedback path is configured to update the model parameter based on a difference between the down-converted output signal and a modeled amplified output signal from the power amplifier model.

11. The system of claim 10, wherein the model parameter is provided directly to the pre-distortion unit and directly to the power amplifier model from a parameter estimation unit located on the feedback path.

12. The system of claim 10, wherein the feedback path comprises:

a parameter estimation unit configured to update the model parameter based on both the pre-distorted signal and an error signal, wherein the error signal is representative of the difference between the down-converted output signal and the modeled amplified output signal.

13. The system of claim 12, wherein the feedback path further comprises:

a comparator arranged on the feedback path and having a first comparator input coupled to an output of the power amplifier circuit, a second comparator input coupled to an output of the power amplifier model, and a comparator output to provide the error signal to an input of the parameter estimation unit.

14. The system of claim 10, wherein the pre-distortion unit calculates the pre-distorted signal according to the following function:

15. The system of claim 10, wherein the pre-distortion unit calculates the pre-distorted signal according to the following function:

16. The system of claim 10, wherein the input signal is a complex digital baseband signal.

17. The system of claim 10:

wherein an amplification characteristic of the power amplifier circuit changes in non-linear fashion due to changes in a magnitude of the input signal; and

wherein the error signal changes the model parameter to keep a magnitude of the output signal provided at an output of the power amplifier circuit substantially linear with respect to the magnitude of the input signal.

18. A system, comprising:

a pre-distortion unit configured to pre-distort an input signal based on a model parameter, thereby providing a pre-distorted signal, wherein the pre-distortion unit calculates the pre-distorted signal according to a sum of memory polynomials and memoryless polynomials which are tuned based on the model parameter, wherein the memoryless polynomials are calculated using a first clock having a first clock frequency and wherein the memory polynomials are calculated using a second clock having a second clock frequency, the first clock frequency being greater than the second clock frequency;

a non-linear circuit configured to process the pre-distorted signal;

a non-linear circuit model configured to model the processing of the pre-distorted signal by the non-linear circuit based on the pre-distorted signal and the model parameter; and

a feedback path coupling an output of the non-linear circuit to the pre-distortion unit and non-linear circuit model, wherein the feedback path is configured to update the model parameter based on a difference between an output signal from the non-linear circuit and a modeled output signal from the non-linear circuit model, and provide the updated model parameter directly to the pre-distortion unit and directly to the non-linear circuit model from a parameter estimation unit located on the feedback path.

19. A method of wireless data transmission, comprising:

receiving an input signal;

pre-distorting the input signal based on a model parameter, h, thereby obtaining a pre-distorted signal, wherein the pre-distorted signal is calculated according to the following function;

20. The method of claim 19, wherein updating the model parameter is updated by iteratively approximating an inverse of the power amplifier circuit by estimating a memoryless polynomial over K iterations and estimating a memory polynomial over M iterations, wherein K is greater than M.