Camera system encoder/decoder architecture
First Claim
1. A camera system, comprising:
- an image sensor chip configured to produce image data representative of light incident upon the image sensor chip;
an image signal processor chip (“
ISP”
) configured to process the image data; and
an image capture accelerator chip (“
ICA”
) coupled between the image sensor chip and the ISP, the image capture accelerator comprising;
an input configured to receive the image data from the image sensor chip;
an encoder configured to, when the camera system is configured to operate in an accelerated capture mode, encode the received image data to produce encoded image data;
a memory configured to store the encoded image data;
a decoder configured to, when the camera system is configured to operate in a standby mode;
access the encoded image data from the memory; and
decode the encoded image data to produce decoded image data; and
an output configured to;
when the camera system is configured to operate in a normal capture mode, output the received image data to the ISP; and
when the camera system is configured to operate in the standby mode, output the decoded image data to the ISP.
3 Assignments
0 Petitions
Accused Products
Abstract
An image capture accelerator performs accelerated processing of image data. In one embodiment, the image capture accelerator includes accelerator circuitry including a pre-processing engine and a compression engine. The pre-processing engine is configured to perform accelerated processing on received image data, and the compression engine is configured to compress processed image data received from the pre-processing engine. In one embodiment, the image capture accelerator further includes a demultiplexer configured to receive image data captured by an image sensor array implemented within, for example, an image sensor chip. The demultiplexer may output the received image data to an image signal processor when the image data is captured by the image sensor array in a standard capture mode, and may output the received image data to the accelerator circuitry when the image data is captured by the image sensor array in an accelerated capture mode.
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Citations
18 Claims
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1. A camera system, comprising:
-
an image sensor chip configured to produce image data representative of light incident upon the image sensor chip; an image signal processor chip (“
ISP”
) configured to process the image data; andan image capture accelerator chip (“
ICA”
) coupled between the image sensor chip and the ISP, the image capture accelerator comprising;an input configured to receive the image data from the image sensor chip; an encoder configured to, when the camera system is configured to operate in an accelerated capture mode, encode the received image data to produce encoded image data; a memory configured to store the encoded image data; a decoder configured to, when the camera system is configured to operate in a standby mode; access the encoded image data from the memory; and decode the encoded image data to produce decoded image data; and an output configured to; when the camera system is configured to operate in a normal capture mode, output the received image data to the ISP; and when the camera system is configured to operate in the standby mode, output the decoded image data to the ISP. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A method for capturing images by a camera system, comprising:
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capturing, by an image sensor chip, light incident upon the image sensor to produce image data representative of the captured light; when the camera system is configured to operate in a normal capture mode; outputting the image data to an image signal processing chip (“
ISP”
);when the camera system is configured to operate in an accelerated capture mode; encoding, by an encoder of an image capture accelerator chip (“
ICA”
), the image data to produce encoded image data; andstoring, in a memory of the ICA, the encoded image data; and when the camera system is configured to operate in a standby mode; accessing the encoded image data from the memory; decoding, by a decoder of the ICA, the encoded image data to produce decoded image data; and outputting the decoded image data to the ISP. - View Dependent Claims (8, 9, 10, 11, 12)
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13. An image capture accelerator integrated circuit (“
- ICA”
), comprising;an input configured to receive image data captured by an image sensor chip; an encoder configured to, when the ICA is configured to operate in an accelerated capture mode, encode the received image data to produce encoded image data; a memory configured to store the encoded image data; a decoder configured to, when the ICA is configured to operate in a standby mode; access the encoded image data from the memory; and decode the encoded image data to produce decoded image data; and an output configured to; when the ICA is configured to operate in a normal capture mode, output the received image data to an image signal processor chip (“
ISP”
); andwhen the ICA is configured to operate in the standby mode, output the decoded image data to the ISP. - View Dependent Claims (14, 15, 16, 17, 18)
- ICA”
Specification