Green NAND SSD application and driver

• US 9,489,258 B2
• Filed: 05/03/2016
• Issued: 11/08/2016
• Est. Priority Date: 06/18/2008
• Status: Active Grant

• Current Assignee: Super Talent Technology, Corporation
• Original Assignee: Super Talent Technology, Corporation
• Inventors: Yu, Frank, Ma, Abraham C., Chen, Shimon, Chang, Yao-Tse, Zhou, Yan
• Primary Examiner(s): Chase, Shelly A
• Application Number:
  US15/145,383
• Publication Number:
  US 20160246807A1
• Time in Patent Office: 189 Days
• US Class Current: 1/1
• CPC Class Codes: G06F 11/1016 Error in accessing a memory location, i.e. addressing error
• CPC Class Codes: G06F 11/1044 with specific ECC/EDC distribution
• CPC Class Codes: G06F 11/1072 in multilevel memories
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 12/0804 with main memory updating G06F12/0806 takes precedence
• CPC Class Codes: G06F 12/1009 using page tables, e.g. page table structures
• CPC Class Codes: G06F 12/1408 by using cryptography for digital transmission H04L9/00
• CPC Class Codes: G06F 16/172 Caching, prefetching or hoarding of files
• CPC Class Codes: G06F 2212/1036 Life time enhancement
• CPC Class Codes: G06F 2212/2022 Flash memory
• CPC Class Codes: G06F 2212/60 Details of cache memory
• CPC Class Codes: G06F 2212/7201 Logical to physical mapping or translation of blocks or pages
• CPC Class Codes: G11C 14/0018 whereby the nonvolatile element is an EEPROM element, e.g. a floating gate or metal-nitride-oxide-silicon [MNOS] transistor
• CPC Class Codes: G11C 29/52 Protection of memory contents; Detection of errors in memory contents
• CPC Class Codes: H03M 13/1102 Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
• CPC Class Codes: H03M 13/1515 Reed-Solomon codes
• CPC Class Codes: H03M 13/152 Bose-Chaudhuri-Hocquenghem [BCH] codes
• CPC Class Codes: H03M 13/19 Single error correction without using particular properties of the cyclic codes, e.g. Hamming codes, extended or generalised Hamming codes
• CPC Class Codes: H03M 13/353 Adaptation to the channel
• CPC Class Codes: H03M 13/356 Unequal error protection [UEP]

Abstract

A GNSD Driver coupled to host DRAM, and having a memory manager, a data grouper engine, a data ungrouper engine, a power manager, and a flush/resume manager. The GNSD driver is coupled to a GNSD application, and the host DRAM to a Non-Volatile Memory Device. The GNSD Driver further includes a compression/decompression engine, a de-duplication engine, an encryption/decryption engine, or a high-level error correction code engine. The encryption/decryption engine encrypts according to DES or AES. A method of operating a GNSD Driver and a GNSD application coupled to DRAM of a host, includes coupling: Configuration and Register O/S Settings to the host and the GNSD Application; a data grouper and data ungrouper to the host DRAM and to Upper and a Lower Filter; a power manager and a memory manager to the host; a flush/resume manager to the DRAM; and the DRAM to an SEED SSD.

Claims

1. A DRAM Translation Layer (DTL) driver method to buffer accesses to a flash memory device comprising:

controlling access to the flash memory device and to a dynamic-random-access memory (DRAM) buffer in response to IO request packets that indicate host reads and host writes, the IO request packets received by a file system filter;

wherein the flash memory device is block-erasable and page-writeable;

using a driver to write host data to the DRAM buffer;

creating a DTL in the DRAM buffer that is controlled by the driver and using the DTL to provide temporary storage to buffer flash accesses;

creating mapping tables to manage data stored in the DTL;

using the mapping tables to distribute data in the DRAM buffer to form a buffer of data for storage in a flash memory device;

during a host write, sending a logical address from the host to a logical-to-DTL mapping table that looks up the logical address to locate a DTL entry for storing data having the logical address from the host;

during a host read, using the logical-to-DTL mapping table and a DTL status table to read data from the DRAM buffer when valid data exists or to read data from the flash memory device when no valid data exists; and

during a flush operation, using a DTL-to-Logical mapping table that stores a logical address of data stored at a DTL entry to locate valid data in the DRAM buffer.

2. The method of claim 1 wherein the mapping tables further comprise a DTL status table that indicates a usage status of data stored at a DTL entry, wherein the usage status indicates when the data stored in the DRAM buffer for a DTL entry is full, partially valid, queued to write to the flash memory device, flushed to the flash memory device, or overwritten.

3. The method of claim 1 further comprising:

using a data split manager to identify a data-type of the write host data to be of a user data-type, a meta data-type, a paging data-type, or a temporary data type;

using the driver to store write host data having the user data-type into a user data buffer in the DTL;

using the driver to store write host data having the meta data-type into a meta data buffer in the DTL;

using the driver to store write host data having the paging data-type into a paging data buffer in the DTL; and

using the driver to store write host data having the temporary data-type into a temporary data buffer in the DTL.

4. The method of claim 1 further comprising:

discarding data having the paging data-type and discarding data having the temporary data-type when the driver is closed or when power is removed;

wherein writes to the flash memory device are reduced by discarding data having the paging data-type and discarding data having the temporary data-type upon power-down.

5. The method of claim 3 further comprising:

sending a parameter message from the driver to the flash memory device, the parameter message having host DTL entry status information read from an DTL entry in the host DTL status table, wherein the host DTL entry status information comprises the data-type, wherein the data-type indicates a user data-type, a meta data-type, a paging data-type, or a temporary data type.

6. The method of claim 1 further comprising:

using the driver to manage a data write cache stored in the DRAM buffer;

writing a full unit of data stored in the DTL in the DRAM buffer that is indicated by a matching entry;

when the data from a host is for a partial unit in the DRAM buffer;

creating or locating a DTL bit mapping table that is pointed to by a pointer in the matching entry in the mapping table;

for each full unit of data from the host, updating an entry in the DTL bit mapping table to indicate a full-unit type;

for a partial unit of data from the host, updating an entry in the DTL bit mapping table to indicate a partial-unit type and a valid bit to indicate a valid partial unit of data;

wherein a plurality of partial units of data are combined to form a full unit of data to reduce write traffic to the flash memory device,

whereby the DTL bit mapping table has entries for full units and for the partial units.

7. The method of claim further comprising:

controlling various functions using a grouping manager;

managing a data write cache stored in the DRAM buffer;

writing a first write data from the host and a header to a beginning of the data write cache;

writing a new write data from the host and a header next to a previous data in the data write cache;

wherein when an updated write data is received from the host and an old data is in the data write cache, the driver discarding the old data and its header and moving a dirty data behind the old data and then appending the updated write data and its header;

wherein when the dirty data has a size of more than a stripe-ready unit and the data write cache is full, the driver writing the stripe-ready unit to the flash memory device;

wherein write host data is stored in the DTL in the DRAM buffer and not immediately written to the flash memory device.

8. A green Solid-State Drive (SSD) flash device comprising:

a file system filter for receiving a logical address, host reads, and host writes from a host;

a dynamic-random-access memory (DRAM) buffer for storing data;

a flash memory device for storing data that is retained when power is lost, the flash memory device being block-erasable and page-writeable;

a controller for controlling access to the flash memory device and to the DRAM buffer in response to host reads and host writes received by the file system filter, the controller writing host data to the DRAM buffer;

a DRAM Translation Layer (DTL) implemented in the DRAM buffer and controlled by the controller that uses the DTL to provide temporary storage to reduce flash wear;

a data write cache stored in the DRAM buffer and managed by the controller;

a logical-to-DTL mapping table that looks up the logical address to locate a DTL entry in the DRAM buffer for storing data having the logical address from the host;

a DTL status table indicating when valid data exists in the DRAM buffer; and

a DTL-to-Logical mapping table that stores a logical address of data stored at a DTL entry to locate valid data in the DRAM buffer, the DTL-to-Logical mapping table used during a flush operation.

9. The green SSD flash device of claim 8 wherein the DTL status table further comprises DTL entry status information that indicates a usage status of data stored at a DTL entry, wherein the usage status indicates when the data stored in the DRAM buffer for a DTL entry is full, partially valid, queued to write to the flash memory device, flushed to the flash memory device, or overwritten.

10. The green SSD flash device of claim $ further comprising:

a data split manager to identify a data-type of a write host data to be of a user data-type, a meta data-type, a paging data-type, or a temporary data type;

the controller for storing write host data having the user data-type into a user data buffer in the DTL;

the controller for storing write host data having the meta data-type into a meta data buffer in the DTL;

the controller for storing write host data having the paging data-type into a paging data buffer in the DTL; and

the controller for storing write host data having the temporary data-type into a temporary data buffer in the DTL.

11. The green SSD flash device of claim 10 further comprising:

a parameter message received from the host, the parameter message having host DTL entry status information read from the DTL status table, wherein the host DTL entry status information comprises the data-type, wherein the data-type indicates a user data-type, a meta data-type, a paging data-type, or a temporary data type.

12. The green SSD flash device of claim 10 further comprising:

a flush controller for flushing data having the user data-type or the meta data-type that is stored in the DRAM buffer to the flash memory device when power is removed;

wherein data having the paging data-type and discarding data having the temporary data-type are discarded when power is removed;

wherein writes to the flash memory device are reduced by discarding data having the paging data-type and discarding data having the temporary data-type upon power-down.

13. The green SSD flash device of claim 10 further comprising:

the controller for managing a data write cache stored in the DRAM buffer;

the controller writing a full unit of data stored in the DTL in the DRAM buffer that is indicated by a matching entry;

when the data from a host is for a partial unit in the DRAM buffer;

the controller creating or locating a DTL bit mapping table that is pointed to by a pointer in the matching entry in the mapping table;

for each full unit of data from the host, the controller updating an entry in the DTL bit mapping table to indicate a full-unit type;

for a partial unit of data from the host, the controller updating an entry in the DTL bit mapping table to indicate a partial-unit type and a valid bit to indicate a valid partial unit of data;

wherein a plurality of partial units of data are combined to form a full unit of data to reduce write traffic to the flash memory device,

whereby the DTL bit mapping table has entries for full units and for the partial units.

14. A green Solid-State Drive (SSD) flash system comprising:

a driver for executing on a host, the driver comprising;

a file system filter for receiving a logical address, host reads, and host writes from a host;

a host dynamic-random-access memory (DRAM) buffer for storing data;

a driver for controlling access to a green SSD flash device and to the host DRAM buffer in response to host reads and host writes received by the file system filter, the driver writing host data to the host DRAM buffer;

a host DRAM Translation Layer (DTL) implemented in the host DRAM buffer and controlled by the driver that uses the host DTL to provide temporary storage to reduce flash wear;

a host data write cache stored in the host DRAM buffer and managed by the driver;

a host logical-to-DTL mapping table that looks up the logical address to locate a host DTL entry in the host DRAM buffer for storing data having the logical address from the host;

a host DTL status table indicating when valid data exists in the host DRAM buffer; and

a host DTL-to-Logical mapping table that stores a logical address of data stored at a host DTL entry to locate valid data in the host DRAM buffer, the host DTL-to-Logical mapping table used during a host flush operation;

a green SSD flash device that comprises;

a dynamic-random-access memory (DRAM) buffer for storing data;

a flash memory device for storing data that is retained when power is lost, the flash memory device being block-erasable and page-writeable;

a controller for controlling access to the flash memory device and to the DRAM buffer in response to host reads and host writes received from the driver executing on the host, the controller writing host data to the DRAM buffer;

a device DRAM Translation Layer (DTL) implemented in the DRAM buffer and controlled by the controller that uses the device DTL to provide temporary storage to reduce flash wear;

a data write cache stored in the DRAM buffer and managed by the controller;

a logical-to-DTL mapping table that looks up the logical address to locate a DTL entry in the DRAM buffer for storing data having the logical address from the host;

a DTL status table indicating when valid data exists in the DRAM buffer; and

a DTL-to-Logical mapping table that stores a logical address of data stored at a DTL entry to locate valid data in the DRAM buffer, the DTL-to-Logical mapping table used during a flush operation.

15. The green SSD flash system of claim 14 wherein the host DTL status table further comprises:

a host DTL entry status information that indicates a usage status of data stored at a host DTL entry;

wherein the usage status indicates when the data stored in the DRAM buffer for a DTL entry is full, partially valid, queued to write to the green SSD flash device, flushed to the green SSD flash device, or overwritten;

a device DTL entry status information that indicates a usage status of data stored at a device DTL entry, wherein a usage status indicates when data stored in the DRAM buffer for a DTL entry is queued to write to the flash memory, flushed to the flash memory, or overwritten.

16. The green SSD flash system of claim 14 further comprising:

a host data split manager to identify a data-type of a host data to be of a user data-type, a meta data-type, a paging data-type, or a temporary data type;

the driver for storing write host data having the user data-type into a user data buffer in the host DTL;

the driver for storing write host data having the meta data-type into a meta data buffer in the host DTL;

the driver for storing write host data having the paging data-type into a paging data buffer in the host DTL; and

the driver for storing write host data having the temporary data-type into a temporary data buffer in the host DTL.

17. The green SSD flash system of claim 16 further comprising:

a driver flush controller for flushing data having the user data-type or the meta data-type that is stored in the host DRAM buffer to the green SSD flash device when power is removed;

wherein data having the paging data-type and data having the temporary data-type are discarded when power is removed;

wherein writes to the green SSD flash device are reduced by discarding data having the paging data-type and discarding data having the temporary data-type upon power-down;

a green SSD flush controller in the driver for flushing data having the user data-type or the meta data-type that is stored in the host DRAM buffer to the flash memory device when power is removed;

wherein data having the paging data-type and the temporary data-type are discarded when power is removed.