Folded memory modules
First Claim
Patent Images
1. A memory system, comprising:
- a motherboard comprising a plurality of motherboard data lines;
a first memory module coupled to at least a first subset of the plurality of motherboard data lines via the first memory module slot, the first memory module comprising a first memory core associated with a first rank and a second memory core associated with a second rank, the first memory module including a first data path to couple the first subset of the plurality of motherboard data lines to the first memory core and to the second memory core;
a second memory module coupled to at least a second subset of the plurality of motherboard data lines via the second memory module slot, the second memory module comprising a third memory core associated with the first rank and a fourth memory core associated with the second rank, the second memory module including a second data path to couple the second subset of the plurality of motherboard data lines to the third memory core and to the fourth memory core;
wherein the first memory core and the third memory core associated with the first rank are each accessible by a memory controller when a first select line associated with the first rank is enabled, and the first memory core and the third memory core associated with the first rank are each inaccessible to the memory controller when the first select line is disabled;
wherein the second memory core and the fourth memory core associated with the second rank are each accessible by a memory controller when a second select line associated with the second rank is enabled, and the second memory core and the fourth memory core associated with the second rank are each inaccessible to the memory controller when the second select line is disabled.
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Abstract
A memory module comprises a data interface including a plurality of data lines and a plurality of configurable switches coupled between the data interface and a data path to one or more memories. The effective width of the memory module can be configured by enabling or disabling different subsets of the configurable switches. The configurable switches may be controlled by manual switches, by a buffer on the memory module, by an external memory controller, or by the memories on the memory module.
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Citations
17 Claims
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1. A memory system, comprising:
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a motherboard comprising a plurality of motherboard data lines; a first memory module coupled to at least a first subset of the plurality of motherboard data lines via the first memory module slot, the first memory module comprising a first memory core associated with a first rank and a second memory core associated with a second rank, the first memory module including a first data path to couple the first subset of the plurality of motherboard data lines to the first memory core and to the second memory core; a second memory module coupled to at least a second subset of the plurality of motherboard data lines via the second memory module slot, the second memory module comprising a third memory core associated with the first rank and a fourth memory core associated with the second rank, the second memory module including a second data path to couple the second subset of the plurality of motherboard data lines to the third memory core and to the fourth memory core; wherein the first memory core and the third memory core associated with the first rank are each accessible by a memory controller when a first select line associated with the first rank is enabled, and the first memory core and the third memory core associated with the first rank are each inaccessible to the memory controller when the first select line is disabled; wherein the second memory core and the fourth memory core associated with the second rank are each accessible by a memory controller when a second select line associated with the second rank is enabled, and the second memory core and the fourth memory core associated with the second rank are each inaccessible to the memory controller when the second select line is disabled. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17)
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Specification