Method and system for driving an active matrix display circuit

• US 9,489,891 B2
• Filed: 01/12/2016
• Issued: 11/08/2016
• Est. Priority Date: 01/09/2006
• Status: Active Grant

• Current Assignee: IGNIS Innovation Incorporated
• Original Assignee: IGNIS Innovation Incorporated
• Inventors: Nathan, Arokia, Chaji, Gholamreza
• Primary Examiner(s): Boddie, William
• Assistant Examiner(s): ELNAFIA, SAIFELDIN E
• Application Number:
  US14/993,174
• Publication Number:
  US 20160125806A1
• Time in Patent Office: 301 Days
• US Class Current: 1/1
• CPC Class Codes: G09G 2300/0417 Special arrangements specific to the use of low carrier mobility technology
• CPC Class Codes: G09G 2300/0426 Layout of electrodes and connections
• CPC Class Codes: G09G 2300/043 Compensation electrodes or other additional electrodes in matrix displays related to distortions or compensation signals, e.g. for modifying TFT threshold voltage in column driver
• CPC Class Codes: G09G 2300/0809 Several active elements per pixel in active matrix panels
• CPC Class Codes: G09G 2300/0819 used for counteracting undesired variations, e.g. feedback or autozeroing
• CPC Class Codes: G09G 2300/0842 forming a memory circuit, e.g. a dynamic memory with one capacitor
• CPC Class Codes: G09G 2300/0861 with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
• CPC Class Codes: G09G 2310/0251 Precharge or discharge of pixel before applying new pixel voltage
• CPC Class Codes: G09G 2310/0262 The addressing of the pixel, in a display other than an active matrix LCD, involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependent on signals of two data electrodes
• CPC Class Codes: G09G 2310/0272 Details of drivers for data electrodes, the drivers communicating data to the pixels by means of a current
• CPC Class Codes: G09G 2320/029 by monitoring one or more pixels in the display panel, e.g. by monitoring a fixed reference pixel
• CPC Class Codes: G09G 2320/043 Preventing or counteracting the effects of ageing
• CPC Class Codes: G09G 3/3233 with pixel circuitry controlling the current through the light-emitting element
• CPC Class Codes: G09G 3/3266 Details of drivers for scan electrodes
• CPC Class Codes: G09G 3/3283 in which the data driver supplies a variable data current for setting the current through, or the voltage across, the light-emitting elements
• CPC Class Codes: G09G 3/3685 Details of drivers for data electrodes
• CPC Class Codes: G09G 3/3696 Generation of voltages supplied to electrode drivers

Abstract

A method and system for driving an active matrix display is provided. The system includes a drive circuit for a pixel having a light emitting device. The drive circuit includes a drive transistor for driving the light emitting device. The system includes a mechanism for adjusting the gate voltage of the drive transistor.

Claims

1. A display system, the system comprising:

a pixel circuit for being programmed according to programming information during a programming cycle, and driven to emit light according to the programming information during an emission cycle, the pixel circuit comprising;

a light emitting device for emitting light during the emission cycle, a drive transistor for conveying a drive current through the light emitting device during the emission cycle, said drive transistor having gate, source and drain terminals, a storage capacitor for being charged with a voltage based at least in part on the programming information during the programming cycle, said storage capacitor having first and second terminals, said first terminal being coupled to the gate of said drive transistor, a first switch transistor, operated according to a first select line, for conveying the voltage to the storage capacitor during the programming cycle, and a regulating transistor for conveying a leakage current to a gate terminal of the drive transistor, thereby adjusting a gate voltage of the drive transistor, said regulating transistor having gate, source and drain terminals, said gate terminal of the regulating transistor being coupled to one of said terminals of said storage capacitor, one of the source and drain terminals of said regulating transistor being coupled to said gate terminal of said drive transistor, and the other of said source and drain terminals of said regulating transistor being coupled via a conductive path to a node between said light emitting device and said drive transistor, the conductive path does not include the drive transistor and does not include the light emitting device, wherein the pixel circuit provides constant averaged current over a frame time.

2. The system according to claim 1, further comprising:

a display array including a plurality of pixel circuits arranged in rows and columns, and

a driver for driving the display array.

3. The system according to claim 2, further comprising:

a display array including a plurality of pixel circuits arranged in rows and columns; and

a driver for driving the display array,

wherein the bias line is shared by more than one pixel circuit of the plurality of pixel circuits.

4. The system according to claim 1, further comprising:

a data driver for programming the pixel circuit via a data line by charging the storage capacitor according to the programming information;

a gate driver to drive the first select line; and

a controller for operating the data driver and the gate driver.

5. The system according to claim 1, wherein the regulating transistor is biased in sub-threshold regime.

6. A display system, the system comprising:

a pixel circuit for being programmed according to programming information during a programming cycle, and driven to emit light according to the programming information during an emission cycle, the pixel circuit comprising;

a light emitting device for emitting light during the emission cycle,

a drive transistor for conveying a drive current through the light emitting device during the emission cycle, said drive transistor having gate, source and drain terminals,

a storage capacitor for being charged with a voltage based at least in part on the programming information during the programming cycle, said storage capacitor having first and second terminals, said first terminal being coupled to the gate of said drive transistor,

a first switch transistor, operated according to a first select line, for conveying the voltage to the storage capacitor during the programming cycle, and

a regulating transistor for conveying a leakage current to a gate terminal of the drive transistor, thereby adjusting a gate voltage of the drive transistor, said regulating transistor having gate, source and drain terminals,

said gate terminal of the regulating transistor being coupled to one of said terminals of said storage capacitor,

one of the source and drain terminals of said regulating transistor being coupled to said gate terminal of said drive transistor, and

the other of said source and drain terminals of said regulating transistor being coupled to a node between said light emitting device and said drive transistor,

at least one switch, said other of said source and drain terminals of said regulating transistor being coupled via said at least one switch to said node between said light emitting device and said drive transistor,

wherein the pixel circuit provides constant averaged current over a frame time.

7. A method of operating a display having a pixel circuit for driving a light emitting device, the method comprising:

charging the pixel circuit, during a programming cycle, by turning on a first switch transistor such that a voltage is charged on a storage capacitor having first and second terminals with the first terminal coupled to a gate terminal of a drive transistor that also has source and drain terminals; and

conveying a leakage current by a regulating transistor having gate, source and drain terminals, said gate terminal of said regulating transistor being coupled to the second terminal of said storage capacitor, one of the source and drain terminals of said regulating transistor being coupled to the gate terminal of the drive transistor, and the other of said source and drain terminals of said regulating transistor being coupled via a conductive path to a node between said light emitting device and said drive transistor, the conductive path does not include the drive transistor and does not include the light emitting device, thereby adjusting the voltage at said node.

8. The method according to claim 7, wherein the pixel circuit provides constant averaged current over a frame time.

9. The method according to claim 7, wherein the first switch transistor is turned on by a select line.

10. The method according to claim 7, wherein the drive transistor and the regulating transistor have the same bias condition.

11. The method according to claim 7, wherein the regulating transistor is biased in sub-threshold regime.

12. The method according to claim 7, further comprising:

forcing the regulating transistor into a linear regime of operation, by turning on a second switch transistor.

13. The method according to claim 7, further comprising:

detecting energy transfer from the pixel circuit by a sensor.

14. The method according to claim 13, wherein the regulating transistor discharges the voltage at the node according to a conductance of the sensor.

15. A method of operating a display having a pixel circuit for driving a light emitting device, the method comprising:

charging the pixel circuit, during a programming cycle, by turning on a first switch transistor such that a voltage is charged on a storage capacitor having first and second terminals with the first terminal coupled to a gate terminal of a drive transistor that also has source and drain terminals;

conveying a leakage current by a regulating transistor having gate, source and drain terminals, said gate terminal of said regulating transistor being coupled to the second terminal of said storage capacitor, one of the source and drain terminals of said regulating transistor being coupled to the gate terminal of the drive transistor, and the other of said source and drain terminals of said regulating transistor being coupled to a node between said light emitting device and said drive transistor, thereby adjusting the voltage at said node, wherein said other of said source and drain terminals of said regulating transistor is coupled via at least one switch to said node between said light emitting device and said drive transistor; and

controlling by the at least one switch, at least one of a time said regulating transistor is active and a current of said regulating transistor.