Error correcting (ECC) memory compatibility

• US 9,495,232 B2
• Filed: 03/28/2014
• Issued: 11/15/2016
• Est. Priority Date: 03/28/2014
• Status: Active Grant

• Current Assignee: Intel NDTM US LLC (Intel Corporation)
• Original Assignee: Intel IP Corporation (Intel Corporation)
• Inventors: Gjorup, Karsten
• Primary Examiner(s): Kerveros, James C
• Application Number:
  US14/228,333
• Publication Number:
  US 20150278012A1
• Time in Patent Office: 963 Days
• Field of Search: 714/769
• US Class Current: 1/1
• CPC Class Codes: G06F 11/076 by exceeding a count or rate limit, e.g. word- or bit count limit
• CPC Class Codes: G06F 11/1048 using arrangements adapted for a specific error detection or correction feature
• CPC Class Codes: G06F 11/1068 in sector programmable memories, e.g. flash disk G06F11/1072 takes precedence
• CPC Class Codes: G06F 11/141 for bus or memory accesses

Abstract

Host device platforms developed based on older ECC (Error Correcting Code) designs may not be equipped to handle the enhanced error correction capabilities in the newer NAND memories. Error correcting memory employing an error threshold representative of the additional capability of the ECC memory allows determining when a fetch has exceeded a safe level of errors to correct. ECC processing compares an error count to the threshold, and if the error count exceeds the threshold of maximum allowable errors, the ECC status module induces an error in the fetched data to alert the host.

Claims

1. A method of memory access, comprising:

comparing a memory error count for a retrieved block of non-volatile memory to a threshold error value, the threshold error value based on an Error Correcting Code (ECC) capability of the non-volatile memory; and

assigning an error value to the retrieved block based on the comparison of the threshold error value and transferring the assigned error value if the memory error count exceeds the threshold error value, the threshold error value indicative of a maximum number of correctable errors per block of the non-volatile memory, the assigned error value based on a host processor issuing a request for the retrieval.

2. The method of claim 1 further comprising generating an error count of a particular value for the assigned error value if the memory error count exceeds the threshold error value.

3. The method of claim 2 further comprising:

transferring the assigned error value as part of the response to the read request.

4. The method of claim 2 wherein the threshold error value is indicative of a maximum number of errors per block that can be accommodated before assigning the error value, the error value specified by the host processor.

5. The method of claim 2 wherein the assigned error value preempts a separate status exchange with the host processor for identifying a status of the retrieval.

6. The method of claim 2 further comprising:

identifying an error correction capability of the memory;

determining if the host processor is responsive to the error correction capability; and

receiving, from the host processor, an indication to set the threshold error value based on the identified error correction capability if host processor does not correspond to the error correction capability of the memory, the host processor being responsive to the assigned error value.

7. The method of claim 1 further comprising transferring a successive retrieved block without transferring an error count status check with the host processor.

8. The method of claim 1 further comprising configuring the threshold error value based on the number of errors correctable by the non-volatile memory.

9. The method of claim 1 wherein the memory error count is based on the number of bit errors in a contiguous portion of memory retrieved in the block.

10. The method of claim 1 wherein the block is a page corresponding to a fetch instruction from the host processor.

11. The method of claim 1 wherein the error value recognized by the host processor defines a value different then the threshold error value.

12. The method of claim 1 wherein returning the assigned error value avoids a separate status inquiry by the host processor.

13. The method of claim 1 wherein the threshold error value is the ECC rating of the memory and the assigned error value defines a 1 bit error.

14. The method of claim 1 further comprising transferring the retrieved block with the assigned error value.

15. A memory device comprising:

a memory operative to store and retrieve blocks;

a correction engine for identifying and correcting errors in the retrieved blocks;

a host interface responsive to a host processor for reading the stored blocks;

a memory_error count, the memory error count assigned by the correction engine;

a threshold error value, the threshold error value based on an Error Correcting Code (ECC) capability of the memory, the memory responsive to the host processor; and

an ECC status module for comparing the memory error count to the threshold error value,

the host interface configured to assign an error value to the retrieved block based on the comparison of the threshold error value and adapted to transfer the assigned error value if the memory error count exceeds the threshold error value, the threshold error value indicative of a maximum number of correctable errors per block of the memory, the assigned error value based on a host processor issuing a request for the retrieval.

16. The memory device of claim 15 wherein the ECC status module is configured to modify the retrieved block to incorporate a 1-bit error.

17. The memory device of claim 16 wherein the host interface is configured to:

transfer the assigned error value as part of the response to the read request.

18. The memory device of claim 16 wherein the threshold error value is preconfigured to be the maximum number of errors per block that the memory is capable of correcting.

19. The memory device of claim 16 wherein the assigned error value preempts a separate status exchange with the host processor for identifying a status of the retrieval.

20. The memory device of claim 17, wherein the threshold error value comparison and data manipulation is done prior to transfer is done on each ECC block.

21. The memory device of claim 15 wherein the host interface is configured for transferring a successive retrieved block without transferring an error count status check with the host processor.

22. A computing device comprising:

a memory operative to store and retrieve blocks;

a correction engine for identifying and correcting errors in the retrieved blocks;

a host interface responsive to a host processor for exchanging the stored blocks;

a memory error count, the memory error count corrected by the correction engine;

a threshold error value, the threshold error value based on the ECC capability of the memory for identifying a number of errors correctable by the correction engine and for comparing the memory error count to the threshold error value;

an ECC status module configured to assign an error value in the retrieved block based on the comparison of the threshold error value and adapted to transfer the assigned error value if the memory error count exceeds the threshold error value, the threshold error value indicative of a maximum number of correctable errors per block of the memory, the assigned error value based on a host processor issuing a request for the retrieval and

a display for rendering data in the retrieved blocks.

23. A computer program product having instructions encoded on a non-transitory computer readable storage medium that, when executed by a processor, perform a method of memory access, comprising:

comparing a memory error count for a retrieved block of non-volatile memory to a threshold error value, the threshold error value set by a host processor in response to an Error Correcting Code (ECC) capability of the non-volatile memory,

transferring the retrieved block to the host processor error free if the memory error count does not exceed the threshold error value; and

assigning an error value in the retrieved block based on the comparison of the threshold error value and transferring the assigned error value if the memory error count exceeds the threshold error value, the threshold error value indicative of a maximum number of correctable errors per block of the non-volatile memory, the assigned error value based on a host processor issuing a request for the retrieval.