Conductive nanoparticles

• US 9,496,355 B2
• Filed: 06/29/2015
• Issued: 11/15/2016
• Est. Priority Date: 08/04/2005
• Status: Active Grant

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Kraus, Brenda D, Marsh, Eugene P.
• Primary Examiner(s): Ward, Eric
• Application Number:
  US14/754,211
• Publication Number:
  US 20150318369A1
• Time in Patent Office: 505 Days
• US Class Current: 1/1
• CPC Class Codes: B82Y 10/00 Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
• CPC Class Codes: B82Y 30/00 Nanotechnology for materials or surface science, e.g. nanocomposites
• CPC Class Codes: H01L 21/28556 by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD H01L21/28518 - H01L21/28537 and H01L21/28568 take precedence
• CPC Class Codes: H01L 29/40114 the electrodes comprising a conductor-insulator-conductor-insulator-semiconductor structure
• CPC Class Codes: H01L 29/42332 with the floating gate formed by two or more non connected parts, e.g. multi-particles flating gate
• CPC Class Codes: H01L 29/7881 Programmable transistors with only two possible levels of programmation H01L29/7888 takes precedence
• CPC Class Codes: Y10S 438/964 Roughened surface
• CPC Class Codes: Y10S 977/943 Information storage or retrieval using nanostructure

Abstract

Isolated conductive nanoparticles on a dielectric layer and methods of fabricating such isolated conductive nanoparticles provide charge storage units in electronic structures for use in a wide range of electronic devices and systems. The isolated conductive nanoparticles may be used as a floating gate in a flash memory. In an embodiment, conductive nanoparticles are deposited on a dielectric layer by a plasma-assisted deposition process such that each conductive nanoparticle is isolated from the other conductive nanoparticles to configure the conductive nanoparticles as charge storage elements.

Claims

1. A method of forming an apparatus, the method comprising:

forming a dielectric in an integrated circuit on a substrate;

forming, after forming the dielectric, conductive nanoparticles on the formed dielectric, the conductive nanoparticles formed by a plasma-assisted deposition process such that each conductive nanoparticle is isolated from the other conductive nanoparticles, wherein forming conductive nanoparticles includes forming iridium;

forming, after forming the conductive nanoparticles, a capping dielectric on and contacting the formed conductive nanoparticles and contacting the dielectric, the capping dielectric providing isolation from conductive elements; and

configuring the conductive nanoparticles as charge storage elements.

2. The method of claim 1, wherein the forming conductive nanoparticles includes forming conductive metal oxide nanoparticles.

3. The method of claim 1, wherein forming conductive nanoparticles on the dielectric by a plasma-assisted deposition process includes forming the conductive nanoparticles on the dielectric by plasma-enhanced atomic layer deposition.

4. The method of claim 1, wherein forming conductive nanoparticles and forming the capping dielectric includes forming silicon oxide.

5. The method of claim 1, wherein forming the conductive nanoparticles by a plasma-assisted deposition process includes applying a plasma to the conductive nanoparticles such that the conductive nanoparticles are roughened by the plasma and density of the conductive nanoparticles is enhanced.

6. The method of claim 1, where the method includes annealing, after forming the conductive nanoparticles and before forming the capping dielectric layer, to control size of the conductive nanoparticles and the isolation of each conductive nanoparticle from the other conductive nanoparticles.

7. The method of claim 1, where the forming conductive nanoparticles includes forming conductive nanoparticles on the dielectric by plasma agglomerated atomic layer deposition.

8. The method of claim 1, wherein the forming conductive nanoparticles includes configuring the conductive nanoparticles such that a plurality of the conductive nanoparticles are disposed on a first plane and another plurality of the conductive nanoparticles are disposed on a second plane, the second plane intersecting the first plane.

9. The method of claim 1, wherein the forming the dielectric includes forming hafnium oxide.

10. The method of claim 1, wherein the forming the dielectric includes forming high-κ

dielectric layer.

11. The method of claim 1, wherein the forming the dielectric includes forming an insulative oxynitride layer.

12. The method of claim 1, wherein the forming the dielectric includes forming a dielectric nanolaminate.

13. The method of claim 1, wherein the forming the dielectric includes forming the dielectric structured as a tunneling dielectric.

14. The method of claim 1, wherein the forming conductive nanoparticles on the dielectric includes forming the conductive nanoparticles on a protrusion extending from the dielectric, the protrusion having vertical sides extending from a surface of the dielectric to a top of the protrusion, with at least one of the conductive nanoparticles formed on and contacting the top of the protrusion and at least one of the conductive nanoparticles formed on and contacting each of the vertical sides of the protrusion.

15. The method of claim 1, wherein configuring the conductive nanoparticles as charge storage elements includes configuring the conductive nanoparticles as charge storage elements in a transistor.