Trench MOSFET having reduced gate charge
First Claim
1. A transistor device, comprising:
- a drain region;
a source region positioned above the drain region;
an active transistor cell including a first gate electrode positioned above and isolated from a portion of the source region adjacent to the first gate electrode; and
a diode connected transistor cell positioned adjacent to the active transistor cell, the diode connected transistor cell including a second gate electrode positioned above and coupled to the source region.
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Abstract
A trench MOSFET device includes a semiconductor layer of a first doping type. MOS transistor cells are in a body region of a second doping type in the semiconductor layer. The transistor cells include a first cell type including a first trench providing a first gate electrode or the first gate electrode is on the semiconductor surface between the first trench and a second trench, and a first source region is formed in the body region. The first gate electrode is electrically isolated from the first source region. A second cell type has a third trench providing a second gate electrode or the second gate electrode is on the semiconductor surface between the third trench and a fourth trench, and a second source region is in the body region. An electrically conductive member directly connects the second gate electrode, first source region and second source region together.
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Citations
20 Claims
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1. A transistor device, comprising:
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a drain region; a source region positioned above the drain region; an active transistor cell including a first gate electrode positioned above and isolated from a portion of the source region adjacent to the first gate electrode; and a diode connected transistor cell positioned adjacent to the active transistor cell, the diode connected transistor cell including a second gate electrode positioned above and coupled to the source region. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A transistor device, comprising:
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a drain layer; a source layer positioned above the drain layer and having a first source region and a second source region separated from the first source region; a source metal layer positioned above the source layer and electrically coupling the first source region to the second source region; a first transistor cell overlapping the first source region, the first transistor cell including a first gate electrode positioned above and free from being directly connected to the first source region; and a second transistor cell overlapping the second source region, the second transistor cell including a second gate electrode positioned above coupled to the second source region via the source metal layer. - View Dependent Claims (10, 11, 12, 13, 14, 15)
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16. An integrated circuit, comprising:
trench MOSFET devices, each having; a drain layer; a source layer positioned above the drain layer and having a first source region and a second source region separated from the first source region; a source metal layer positioned above the source layer and electrically coupling the first source region to the second source region; a first transistor cell overlapping the first source region, the first transistor cell including a first gate electrode positioned above and free from being directly connected to the first source region; and a second transistor cell overlapping the second source region, the second transistor cell including a second gate electrode positioned above and coupled to the second source region via the source metal layer. - View Dependent Claims (17, 18, 19, 20)
Specification