CMOS ultrasonic transducers and related apparatus and methods
First Claim
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1. A method comprising:
- depositing a first conductive layer on a silicon wafer;
depositing a second conductive layer on the first conductive layer;
depositing a first layer of SiO2 on the second conductive layer;
etching at least one cavity in the first layer of SiO2, a bottom surface of the at least one cavity corresponding to the second conductive layer;
depositing a second layer of SiO2 on the first layer of SiO2;
planarizing the second layer of SiO2;
bonding a second wafer comprising silicon to the silicon wafer with a fusion bond;
thinning a backside of the second wafer distal the at least one cavity to form a membrane over the at least one cavity; and
depositing a third conductive layer on the membrane.
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Abstract
CMOS Ultrasonic Transducers and processes for making such devices are described. The processes may include forming cavities on a first wafer and bonding the first wafer to a second wafer. The second wafer may be processed to form a membrane for the cavities. Electrical access to the cavities may be provided.
173 Citations
6 Claims
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1. A method comprising:
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depositing a first conductive layer on a silicon wafer; depositing a second conductive layer on the first conductive layer; depositing a first layer of SiO2 on the second conductive layer; etching at least one cavity in the first layer of SiO2, a bottom surface of the at least one cavity corresponding to the second conductive layer; depositing a second layer of SiO2 on the first layer of SiO2; planarizing the second layer of SiO2; bonding a second wafer comprising silicon to the silicon wafer with a fusion bond; thinning a backside of the second wafer distal the at least one cavity to form a membrane over the at least one cavity; and depositing a third conductive layer on the membrane. - View Dependent Claims (2, 3, 4, 5, 6)
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