Microcomputer
First Claim
1. A microcomputer comprising:
- a CPU that executes selectively (i) a main program and (ii) an onboard rewriting program that executes an onboard rewriting of the main program; and
a nonvolatile memory that includes (i) a rewriting permitted area where data are enabled to be rewritten and (ii) a rewriting forbidden area where data are forbidden from being rewritten,the rewriting permitted area storing the main program,the rewriting forbidden area storing the onboard rewriting program,the rewriting forbidden area further storing an interrupt vector with respect to each of a plurality of interrupt factors, the interrupt factors being different from each other,the interrupt vector indicating an address of a branch destination when each of the plurality of interrupt factors arises,the microcomputer further comprising;
a change section that uses the address indicated by the interrupt vector and changes a CPU-accessed address, which is an address accessed by the CPU, into either an address within the main program or an address within the onboard rewriting program according to the main program or the onboard rewriting program, whichever is executed,wherein;
the main program includes a user vector stored in a predetermined address that is predetermined with respect to each of the plurality of interrupt factors, the user vector indicating an address which stores an interrupt processing program that is executed when each of the plurality of interrupt factors arises;
the change section specifies the predetermined address storing the user vector when changing the CPU-accessed address into the address within the main program;
the change section includes a variable pointer,the variable pointer being rewritten into a predetermined address storing a user vector with respect to a subject interrupt factor that is one of the plurality of interrupt factors by an instruction of the main program when the main program is executed,the variable pointer being rewritten into an address within the onboard rewriting program storing an interrupt processing program that is executed when the subject interrupt factor arises by an instruction of the onboard rewriting program when the onboard rewriting program is executed; and
the interrupt vectorrefers to the variable pointer with respect to the subject interrupt factor arising, andprovides the CPU-accessed address.
1 Assignment
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Accused Products
Abstract
A rewriting area of a flash ROM stores a main program, which includes a user vector with respect to each of interrupt factors that are different from each other in respect of types. The user vector with respect to a subject interrupt factor indicates an address, which stores an interrupt processing program that is executed when the subject interrupt factor arises. This user vector is stored in a predetermined address dedicated for the subject interrupt factor. The predetermined address of the user vector is enabled to be specified by an interrupt vector or interrupt changeover program, both of which are stored in a non-rewriting area of the flash ROM. Even when an address of the interrupt processing program is changed, the changed address is enabled to be indicated by using the user vector.
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Citations
6 Claims
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1. A microcomputer comprising:
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a CPU that executes selectively (i) a main program and (ii) an onboard rewriting program that executes an onboard rewriting of the main program; and a nonvolatile memory that includes (i) a rewriting permitted area where data are enabled to be rewritten and (ii) a rewriting forbidden area where data are forbidden from being rewritten, the rewriting permitted area storing the main program, the rewriting forbidden area storing the onboard rewriting program, the rewriting forbidden area further storing an interrupt vector with respect to each of a plurality of interrupt factors, the interrupt factors being different from each other, the interrupt vector indicating an address of a branch destination when each of the plurality of interrupt factors arises, the microcomputer further comprising; a change section that uses the address indicated by the interrupt vector and changes a CPU-accessed address, which is an address accessed by the CPU, into either an address within the main program or an address within the onboard rewriting program according to the main program or the onboard rewriting program, whichever is executed, wherein; the main program includes a user vector stored in a predetermined address that is predetermined with respect to each of the plurality of interrupt factors, the user vector indicating an address which stores an interrupt processing program that is executed when each of the plurality of interrupt factors arises; the change section specifies the predetermined address storing the user vector when changing the CPU-accessed address into the address within the main program; the change section includes a variable pointer, the variable pointer being rewritten into a predetermined address storing a user vector with respect to a subject interrupt factor that is one of the plurality of interrupt factors by an instruction of the main program when the main program is executed, the variable pointer being rewritten into an address within the onboard rewriting program storing an interrupt processing program that is executed when the subject interrupt factor arises by an instruction of the onboard rewriting program when the onboard rewriting program is executed; and the interrupt vector refers to the variable pointer with respect to the subject interrupt factor arising, and provides the CPU-accessed address. - View Dependent Claims (2, 3)
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4. A microcomputer comprising:
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a CPU that executes selectively (i) a main program and (ii) an onboard rewriting program that executes an onboard rewriting of the main program; and a nonvolatile memory that includes (i) a rewriting permitted area where data are enabled to be rewritten and (ii) a rewriting forbidden area where data are forbidden from being rewritten, the rewriting permitted area storing the main program, the rewriting forbidden area storing the onboard rewriting program, the rewriting forbidden area further storing an interrupt vector with respect to each of a plurality of interrupt factors, the interrupt factors being different from each other, the interrupt vector indicating an address of a branch destination when each of the plurality of interrupt factors arises, the microcomputer further comprising; a change section that uses the address indicated by the interrupt vector and changes a CPU-accessed address, which is an address accessed by the CPU, into either an address within the main program or an address within the onboard rewriting program according to the main program or the onboard rewriting program, whichever is executed, wherein; the main program includes a user vector stored in a predetermined address that is predetermined with respect to each of the plurality of interrupt factors, the user vector indicating an address which stores an interrupt processing program that is executed when each of the plurality of interrupt factors arises; the change section specifies the predetermined address storing the user vector when changing the CPU-accessed address into the address within the main program; the change section includes an interrupt changeover program stored in the rewriting forbidden area of the nonvolatile memory; when one of the plurality of interrupt factors arises, the interrupt vector instructs the CPU to execute the interrupt changeover program; the interrupt changeover program, which is executed, (i) determines whether the main program or the onboard rewriting program was executed from a position of a program counter when the one of the plurality of interrupt factors arises and (ii) acquires type information of the one of the plurality of interrupt factors arising, the type information specifying one of a plurality of types in which the interrupt factors are different from each other; the interrupt changeover program calculates as the CPU-accessed address an address which stores the user vector with respect to an interrupt factor that is one of the plurality of interrupt factors corresponding to the acquired type information when the main program was executed; and the interrupt changeover program calculates as the CPU-accessed address an address within the onboard rewriting program storing an interrupt processing program, which is executed when the interrupt factor corresponding the acquired type information arises, when the onboard rewriting program was executed. - View Dependent Claims (5, 6)
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Specification