Multi-level message passing descriptor
First Claim
1. An apparatus comprising a processor, a logic and a memory, wherein the processor, logic and memory are operable to configure a data structure comprising:
- one or more second level descriptors; and
one or more first level linked lists corresponding to the one or more second level descriptors;
wherein each second level descriptor comprises a data descriptor address for pointing to a corresponding first level linked list;
wherein each first level linked list comprises one or more first level descriptors;
wherein each first level descriptor comprises a buffer address for pointing to a corresponding data buffer; and
wherein at least one first level linked list and the corresponding one or more first level descriptors are accessed by a first and second DMA channel for coordinated data transfer of the corresponding data buffer;
wherein the one or more first level descriptors are shared by a plurality of DMA engines.
2 Assignments
0 Petitions
Accused Products
Abstract
In an embodiment of the invention, a method for to use a two level linked list descriptor mechanism to pass information among flash, memory, and IO controller modules is presented. The method includes creating a first level data structure for one or more first level descriptors; creating a second level data structure for one or more second level descriptors, each second level descriptor having a pointer to tracking information that includes start information, running information, and rewind information for a data DMA; using the one or more second level descriptors, the one or more first level descriptors, and the tracking information for a data DMA; updating the tracking information during the data DMA; and updating the tracking information at the end of the data DMA.
260 Citations
18 Claims
-
1. An apparatus comprising a processor, a logic and a memory, wherein the processor, logic and memory are operable to configure a data structure comprising:
-
one or more second level descriptors; and one or more first level linked lists corresponding to the one or more second level descriptors; wherein each second level descriptor comprises a data descriptor address for pointing to a corresponding first level linked list; wherein each first level linked list comprises one or more first level descriptors; wherein each first level descriptor comprises a buffer address for pointing to a corresponding data buffer; and wherein at least one first level linked list and the corresponding one or more first level descriptors are accessed by a first and second DMA channel for coordinated data transfer of the corresponding data buffer; wherein the one or more first level descriptors are shared by a plurality of DMA engines. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
-
-
9. A method for DMA data transfer, comprising:
-
processing one or more second level descriptors; retrieving one or more first level descriptors from the one or more second level descriptors; performing one or more DMA data transfers according to the one or more first level descriptors; updating one or more rewind information to the one or more second level descriptors; and rewinding the one or more DMA data transfers according to the current rewind information upon detecting one or more errors; wherein the one or more first level descriptors are shared by a plurality of DMA engines.
-
-
10. A method comprising:
-
creating a first level data structure for one or more first level descriptors; creating a second level data structure for one or more second level descriptors, each second level descriptor having a pointer to tracking information that includes start information, running information, and rewind information for a data DMA; using the one or more second level descriptors, the one or more first level descriptors, and the tracking information for a data DMA; updating the tracking information during the data DMA; and updating the tracking information at the end of the data DMA; wherein the one or more first level descriptors are shared by a plurality of DMA engines. - View Dependent Claims (11, 12, 13, 14, 15, 16)
-
-
17. An article of manufacture, comprising:
-
a non-transient computer-readable medium having stored thereon instructions that permit a method comprising; processing one or more second level descriptors; retrieving one or more first level descriptors from the one or more second level descriptors; performing one or more DMA data transfers according to the one or more first level descriptors; updating one or more rewind information to the one or more second level descriptors; and rewinding the one or more DMA data transfers according to the current rewind information upon detecting one or more errors; wherein the one or more first level descriptors are shared by a plurality of DMA engines.
-
-
18. An article of manufacture, comprising:
-
a non-transient computer-readable medium having stored thereon instructions that permit a method comprising; creating a first level data structure for one or more first level descriptors; creating a second level data structure for one or more second level descriptors, each second level descriptor having a pointer to tracking information that includes start information, running information, and rewind information for a data DMA; using the one or more second level descriptors, the one or more first level descriptors, and the tracking information for a data DMA; updating the tracking information during the data DMA; and updating the tracking information at the end of the data DMA; wherein the one or more first level descriptors are shared by a plurality of DMA engines.
-
Specification