Storage devices and methods of operating storage devices

• US 9,502,128 B2
• Filed: 05/02/2016
• Issued: 11/22/2016
• Est. Priority Date: 08/19/2014
• Status: Active Grant

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Lee, Ju Seok
• Primary Examiner(s): Byrne, Harry W
• Application Number:
  US15/143,971
• Publication Number:
  US 20160247577A1
• Time in Patent Office: 204 Days
• Field of Search: 36518501-18533
• US Class Current: 1/1
• CPC Class Codes: G11C 11/5642 Sensing or reading circuits; Data output circuits
• CPC Class Codes: G11C 16/0483 comprising cells having several storage transistors connected in series
• CPC Class Codes: G11C 16/08 Address circuits; Decoders; Word-line control circuits
• CPC Class Codes: G11C 16/10 Programming or data input circuits
• CPC Class Codes: G11C 16/26 Sensing or reading circuits; Data output circuits
• CPC Class Codes: G11C 16/34 Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
• CPC Class Codes: G11C 16/3445 Circuits or methods to verify correct erasure of nonvolatile memory cells
• CPC Class Codes: G11C 16/349 Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles
• CPC Class Codes: G11C 29/44 Indication or identification of errors, e.g. for repair

Abstract

A method of operating a storage device may include receiving a read command and a read address, performing a read operation on selected memory cells corresponding to a selected string selection line and a selected word line based on the read address and performing a reliability verification read on unselected memory cells. Data read by the read operation may be output to an external device, and data read by the reliability verification read may be not output to the external device.

Claims

1. A method of operating a storage device comprising a nonvolatile memory device and a memory controller configured to control the nonvolatile memory device,

wherein the nonvolatile memory device comprises a plurality of memory blocks, each memory block comprising a plurality of memory cells connected to word lines and stacked a direction perpendicular to a substrate and string selection transistors connected to string selection lines,

wherein, in each memory block, memory cells located at a same height from the substrate are connected to a wordline in common, and

wherein the method comprises:

receiving a read request;

performing a read operation on selected memory cells associated with a selected string selection line and a selected word line in a selected memory block in response to the read request;

performing a first reliability verification read on memory cells associated with an upper or lower word line of the selected word line and the selected string selection line in the selected memory block; and

performing a second reliability verification read on memory cells associated with an upper or lower word line of the selected word line and an unselected string selection line in the selected memory block.

2. The method of claim 1, wherein when the first reliability verification read is performed on the upper word line, the second reliability verification read is performed on the lower word line.

3. The method of claim 1, wherein when the first reliability verification read is performed on the lower word line, the second reliability verification read is performed on the upper word line.

4. The method of claim 1, further comprising:

performing a third reliability verification read on memory cells associated with randomly selected word line in the selected memory block.

5. The method of claim 1, further comprising:

performing a third reliability verification read on memory cells having erased state in the selected memory block.

6. The method of claim 1, further comprising:

when a number of errors of verified memory cells, on which the first or second reliability verification read is performed, is greater than a critical value, copying data of the verified memory cells to another memory block.

7. The method of claim 6, further comprising:

after copying the data of the verified memory cells, copying data of the plurality of memory cells except the verified memory cells to the another memory block.

8. The method of claim 1, wherein:

each of the upper and lower word line is adjacent to the selected word line.

9. The method of claim 1, further comprising:

when a number of errors of verified memory cells, on which the first or second reliability verification read is performed, is greater than a critical value, copying data of memory cells associated with verified string selection line, on which the first or second reliability verification read is performed, to another memory block.

10. The method of claim 1, further comprising:

when a number of errors of verified memory cells, on which the first or second reliability verification read is performed, is greater than a critical value, copying data of memory cells associated with the selected string selection line to another memory block.

11. The method of claim 1, further comprising:

determining whether to perform a read reclaim on the selected memory block by comparing results of the first and second reliability verification reads with first and second critical values respectively, the first critical value being different from the second critical value.

12. The method of claim 1, further comprising:

determining whether to perform the reliability verification read by comparing a read count of the selected memory block with a first critical value.

13. A storage device comprising:

a nonvolatile memory device comprising a plurality of memory blocks, each memory block comprising a plurality of memory cells connected to word lines and stacked a direction perpendicular to a substrate and string selection transistors connected to string selection lines; and

a memory controller configured to receive a read request from an external host device, transmit a first read command and a first address to the nonvolatile memory device in response to the read request, receive first data of selected memory cells associated with a selected string selection line and a selected memory block of a selected memory block corresponding to the first address from the nonvolatile memory device, and output the first data to the external host device,

wherein, in each memory block, memory cells located at a same height from the substrate are connected to a word line in common,

wherein the memory controller is further configured to transmit a second read command and a second address to the nonvolatile memory device, receive second data of memory cells associated with an upper or lower word line of the selected word line and the selected string selection line of the selected memory block, and check reliability of the second data, and

wherein the memory controller is further configured to transmit a third read command and a third address to the nonvolatile memory device, receive third data of memory cells associated with an upper or lower word line of the selected word line and an unselected string selection line of the selected memory block, and check reliability of the third data.

14. The storage device of claim 13, wherein the memory controller is further configured to copy all or a portion of data of the plurality of memory cells of the selected memory block to another memory block according to reliabilities of the second data and the third data.

15. The storage device of claim 13, wherein the memory controller is further configured to transmit a fourth read command and a fourth address to the nonvolatile memory device, receive fourth data of memory cells associated with randomly selected word line in the selected memory block, and check reliability of the fourth data.

16. The storage device of claim 13, wherein the memory controller is further configured to when a number of errors of verified memory cells, on which the reliability is checked, is greater than a critical value, copy data of the verified memory cells to another memory block.

17. A method of operating a storage device comprising a nonvolatile memory device and a memory controller configured to control the nonvolatile memory device,

wherein the nonvolatile memory device comprises a plurality of memory blocks, each memory block comprising a plurality of memory cells connected to word lines and stacked a direction perpendicular to a substrate and string selection transistors connected to string selection lines,

wherein, in each memory block, memory cells located at a same height from the substrate are connected to a wordline in common, and

wherein the method comprises:

receiving a read request;

performing a read operation on selected memory cells associated with a selected string selection line and a selected word line in a selected memory block in response to the read request; and

when a read count reaches a critical value;

performing a first reliability verification read on memory cells associated with an upper or lower word line of the selected word line and the selected string selection line in the selected memory block; and

performing a second reliability verification read on memory cells associated with an upper or lower word line of the selected word line and an unselected string selection line in the selected memory block.

18. The method of claim 17, wherein:

the critical values is a random number, and

the random number is updated and the count is reset when the reliability verification read is performed.

19. The method of claim 17, wherein:

each of the upper and lower word line is adjacent to the selected word line.

20. The method of claim 17, further comprising:

performing a third reliability verification read on memory cells associated with randomly selected word line in the selected memory block.