Using modeling to determine wafer bias associated with a plasma system
First Claim
1. A method for determining wafer bias, the method comprising:
- receiving, by a processor from an output of a generator, a generator output complex voltage and current, the generator coupled to an impedance matching circuit, the impedance matching circuit coupled via a radio frequency (RF) transmission line to an electrostatic chuck (ESC) of a plasma chamber;
determining, by the processor, from the generator output complex voltage and current a projected complex voltage and current at a point along a path between an output of a model of the impedance matching circuit and a model of the ESC, the determining of the projected complex voltage and current performed using a model for at least part of the path, the model for at least part of the path characterizing physical components along the path, the model for at least part of the path including an RF transmission model of the RF transmission line, wherein the RF transmission model includes a model of an RF tunnel and a model of an RF strap, the RF tunnel model coupled with the RF strap model; and
applying, by the processor, the projected complex voltage and current as an input to a function to map the projected complex voltage and current to a wafer bias value at the ESC model.
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Abstract
Systems and methods for determining wafer bias are described. One of the methods includes detecting output of a generator to identify a generator output complex voltage and current (V&I). The generator is coupled to an impedance matching circuit and the impedance matching circuit is coupled to an electrostatic chuck (ESC). The method further includes determining from the generator output complex V&I a projected complex V&I at a point along a path between an output of a model of the impedance matching circuit and a model of the ESC. The operation of determining of the projected complex V&I is performed using a model for at least part of the path. The method includes applying the projected complex V&I as an input to a function to map the projected complex V&I to a wafer bias value at the ESC model.
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Citations
35 Claims
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1. A method for determining wafer bias, the method comprising:
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receiving, by a processor from an output of a generator, a generator output complex voltage and current, the generator coupled to an impedance matching circuit, the impedance matching circuit coupled via a radio frequency (RF) transmission line to an electrostatic chuck (ESC) of a plasma chamber; determining, by the processor, from the generator output complex voltage and current a projected complex voltage and current at a point along a path between an output of a model of the impedance matching circuit and a model of the ESC, the determining of the projected complex voltage and current performed using a model for at least part of the path, the model for at least part of the path characterizing physical components along the path, the model for at least part of the path including an RF transmission model of the RF transmission line, wherein the RF transmission model includes a model of an RF tunnel and a model of an RF strap, the RF tunnel model coupled with the RF strap model; and applying, by the processor, the projected complex voltage and current as an input to a function to map the projected complex voltage and current to a wafer bias value at the ESC model. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A method for determining wafer bias, the method comprising:
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receiving, by a processor, one or more generator output complex voltages and currents measured at one or more outputs of one or more generators, the one or more generators coupled to an impedance matching circuit, the impedance matching circuit coupled via a radio frequency (RF) transmission line to an electrostatic chuck (ESC) of a plasma chamber; determining, by the processor, from the one or more generator output complex voltages and currents a projected complex voltage and current at a point along a path between a model of the impedance matching circuit and a model of the ESC, the model of the impedance matching circuit characterizing the impedance matching circuit and the model of the ESC characterizing the ESC, wherein the path includes an RF transmission model of the RF transmission line, wherein the RF transmission model includes a model of an RF tunnel and a model of an RF strap, the RF tunnel model coupled with the RF strap model; and calculating, by the processor, a wafer bias at the point by using the projected complex voltage and current as an input to a function. - View Dependent Claims (9, 10, 11, 12, 13, 14)
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15. A method for determining wafer bias, the method comprising:
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identifying, by a processor, a first complex voltage and current measured at an output of a radio frequency (RF) generator when the RF generator is coupled to a plasma chamber via an impedance matching circuit, the impedance matching circuit having an input coupled to the output of the RF generator and an output coupled to an RF transmission line; generating, by the processor, an impedance matching model based on electrical components defined in the impedance matching circuit, the impedance matching model having an input and an output, the input of the impedance matching model receiving the first complex voltage and current, the impedance matching model having one or more elements; generating, by the processor, an RF transmission model based on circuit components defined in the RF transmission line, wherein the RF transmission model includes a model of an RF tunnel and a model of an RF strap, the RF tunnel model coupled with the RF strap model; propagating, by the processor, the first complex voltage and current through the one or more elements from the input of the impedance matching model to the output of the impedance matching model to determine a second complex voltage and current, wherein the second complex voltage and current is at the output of the impedance matching model; and determining, by the processor, a wafer bias based on a voltage magnitude of the second complex voltage and current, a current magnitude of the second complex voltage and current, and a power magnitude of the second complex voltage and current, wherein the wafer bias is determined using at least a portion of the RF transmission model. - View Dependent Claims (16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28)
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29. A plasma system for determining wafer bias, comprising:
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one or more radio frequency (RF) generators for generating one or more RF signals, the one or more RF generators associated with one or more voltage and current probes, wherein the one or more voltage and current probes are configured to measure one or more complex voltages and currents at corresponding one or more outputs of the one or more RF generators; an impedance matching circuit coupled to the one or more RF generators; a plasma chamber coupled to the impedance matching circuit via an RF transmission line, the plasma chamber including an electrostatic chuck (ESC), the ESC coupled to the RF transmission line; and a processor coupled to the one or more RF generators, the processor configured to; receive the one or more complex voltages and currents; determine from the one or more complex voltages and currents projected complex voltage and current at a point along a path between a model of the impedance matching circuit and a model of the ESC, the model of the impedance matching circuit characterizing the impedance matching circuit and the model of the ESC characterizing the ESC, wherein the path includes an RF transmission model of the RF transmission line, wherein the RF transmission model includes a model of an RF tunnel and a model of an RF strap, the RF tunnel model coupled with the RF strap model; and calculate a wafer bias at the point by using the projected complex voltage and current as an input to a function. - View Dependent Claims (30, 31, 32, 33, 34, 35)
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Specification