Thin film transistor, method for manufacturing the same, array substrate and display device

• US 9,502,235 B2
• Filed: 12/13/2012
• Issued: 11/22/2016
• Est. Priority Date: 02/27/2012
• Status: Active Grant

• Current Assignee: BOE Technology Group Co., Ltd.
• Original Assignee: BOE Technology Group Co., Ltd.
• Inventors: Cao, Zhanfeng, Zhang, Xuehui
• Primary Examiner(s): Parker, Allen
• Assistant Examiner(s): BRADLEY, STEPHEN M
• Application Number:
  US13/991,729
• Publication Number:
  US 20140061634A1
• Time in Patent Office: 1,440 Days
• Field of Search: 257/40, 257/43, 438/104
• US Class Current: 1/1
• CPC Class Codes: H01L 21/02244 of a metallic layer
• CPC Class Codes: H01L 27/1248 with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/78606 with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device H01L29/78642, H01L29/78645 take precedence
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

According to embodiments of the invention, a thin film transistor (TFT), a manufacturing method of the TFT, an array substrate and a display device are provided. The manufacturing method of the TFT comprises: forming a gate electrode on a substrate; forming a gate insulating layer on the substrate formed with the gate electrode; forming an oxide semiconductor active layer, an etch stop layer and a source/drain electrode on the gate insulating layer, wherein the etch stop layer is obtained by an oxidation treatment.

Claims

1. A manufacturing method of a thin film transistor (TFT), comprising:

forming a gate electrode on a substrate;

forming a gate insulating layer on the substrate formed with the gate electrode;

forming an oxide semiconductor active layer, an etch stop layer and a source/drain electrode on the gate insulating layer;

wherein the oxide semiconductor active layer, the etch stop layer and the source/drain electrode are formed by a same mask process;

wherein the etch stop layer and the source/drain electrode are made from a same metal material and the etch stop layer is obtained by an oxidation treatment which is performed on the metal material; and

wherein forming the oxide semiconductor active layer, the etch stop layer and the source/drain electrode by a same mask process comprises;

forming an oxide semiconductor layer on the substrate formed with the gate insulating layer;

forming a metal film made of the metal material on the oxide semiconductor layer;

applying a photoresist layer on and in contact with the metal film, performing an exposure process by using a half-tone mask or a gray tone mask and performing a developing process to form a photoresist-completely-remained region corresponding to a region of the source/drain electrode, a photoresist-partially-remained region corresponding to a channel region of the TFT and a photoresist-completely-removed region exposing remaining regions on the metal film;

removing the metal film and the oxide semiconductor layer in the photoresist-completely-removed region by an etching process to obtain the metal film and the oxide semiconductor active layer which have a same covering area;

removing the photoresist layer in the photoresist-partially-remained region by an ashing process to expose a portion of the metal film;

performing the oxidation treatment on the exposed portion of the metal film so that the exposed portion of the metal film is completely converted into an oxygen-rich insulating layer for forming the etch stop layer; and

removing remaining photoresist layer to obtain the source/drain electrode and the etch stop layer;

wherein before performing the oxidation treatment, the metal film corresponding to the channel region is not subjected to an etching process, and a top surface of the etch stop layer and a top surface of the source/drain electrode are in a same horizontal plane.

2. The method according to claim 1, further comprising:

forming a first thin film on the gate insulating layer and performing another oxidation treatment on the first thin film to form a first insulating layer,

wherein the oxide semiconductor active layer is provided on the first insulating layer.

3. The method according to claim 2, wherein the gate insulating layer comprises SiNx, and the first insulating layer comprises SiOx.

4. The method according to claim 1, wherein a metal film is formed on the oxide semiconductor active layer, the etch stop layer is formed by oxidizing a part of the metal film in a channel region of the TFT, the source/drain electrode is the remaining part of the metal film which are located at two opposite sides of the oxidized part.