Semiconductor device and method of fabricating the same
First Claim
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1. A semiconductor device, comprising:
- a substrate including a first region and a second region;
a first trench and a second trench disposed on the first and second regions, respectively;
a first gate pattern provided in the first trench, the first gate pattern including a first gate insulating layer and a first gate electrode;
a second gate pattern provided in the second trench, the second gate pattern including a second gate insulating layer and a second gate electrode; and
an interlayer insulating layer enclosing the first and second gate patterns,wherein the first gate insulating layer is thicker than the second gate insulating layer,wherein the second trench has a width increasing in a direction away from the substrate, andwherein a top entrance and a bottom surface of the first trench have substantially the same width.
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Abstract
Provided is a semiconductor device and method of fabricating the same. The device includes a substrate including a first region and a second region, a first gate pattern on the first region, a second gate pattern on the second region, and an interlayer insulating layer enclosing the first and second gate patterns. The first gate pattern including a first gate insulating layer and a first gate electrode, the second gate pattern including a second gate insulating layer and a second gate electrode, the first gate insulating layer is thicker than the second gate insulating layer, and a top width of the second gate pattern is larger than a bottom width thereof.
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Citations
17 Claims
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1. A semiconductor device, comprising:
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a substrate including a first region and a second region; a first trench and a second trench disposed on the first and second regions, respectively; a first gate pattern provided in the first trench, the first gate pattern including a first gate insulating layer and a first gate electrode; a second gate pattern provided in the second trench, the second gate pattern including a second gate insulating layer and a second gate electrode; and an interlayer insulating layer enclosing the first and second gate patterns, wherein the first gate insulating layer is thicker than the second gate insulating layer, wherein the second trench has a width increasing in a direction away from the substrate, and wherein a top entrance and a bottom surface of the first trench have substantially the same width. - View Dependent Claims (2, 3, 4, 5, 6, 7, 13, 14)
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8. A semiconductor device, comprising:
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a substrate including a first region and a second region; a first gate pattern on the first region, the first gate pattern including a first gate insulating layer and a first gate electrode; a second gate pattern on the second region, the second gate pattern including a second gate insulating layer and a second gate electrode; and spacers provided on sidewalls of each of the first and second gate patterns, wherein a upper portion of each of the spacers of the first gate pattern has a width different from a upper portion of each of the spacers of the second gate pattern, top and bottom surfaces of the first gate pattern have substantially the same width, and a top width of the second gate pattern is larger than a bottom width thereof. - View Dependent Claims (9, 10, 11, 12, 15)
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16. A semiconductor device, comprising:
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a substrate including a first region and a second region; a first gate pattern on the first region, the first gate pattern including a first gate insulating layer and a first gate electrode; a second gate pattern on the second region, the second gate pattern including a second gate insulating layer and a second gate electrode; and an interlayer insulating layer enclosing the first and second gate patterns, wherein the first gate insulating layer is thicker than the second gate insulating layer, wherein the second gate pattern has a width increasing in a direction away from the substrate, and wherein top and bottom surfaces of the first gate pattern have substantially the same width. - View Dependent Claims (17)
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Specification