Method for thin film encapsulation (TFE) of a microelectromechanical system (MEMS) device and the MEMS device encapsulated thereof

• US 9,505,612 B2
• Filed: 12/19/2014
• Issued: 11/29/2016
• Est. Priority Date: 12/19/2013
• Status: Active Grant

• Current Assignee: Agency For Science Technology and Research
• Original Assignee: Agency For Science Technology and Research
• Inventors: Lee, Jae-Wung, Sharma, Jaibir, Singh, Navab
• Primary Examiner(s): NGO, NGAN V
• Application Number:
  US14/577,337
• Publication Number:
  US 20150175408A1
• Time in Patent Office: 711 Days
• US Class Current: 1/1
• CPC Class Codes: B81C 1/00293 maintaining a controlled atmosphere with processes not provided for in B81C1/00285
• CPC Class Codes: B81C 2203/0136 Growing or depositing of a covering layer
• CPC Class Codes: B81C 2203/0145 Hermetically sealing an opening in the lid
• CPC Class Codes: H01L 2924/1461 MEMS

Abstract

A method for thin film encapsulation (TFE) of a microelectromechanical system (MEMS) device, including providing a substrate; forming a MEMS device on the substrate; forming one or more etching channels adjacent to the MEMS device; providing one or more cavities below the MEMS device; and forming one or more cavities above the MEMS device.

Claims

1. A method for thin film encapsulation (TFE) of a microelectromechanical system (MEMS) device, comprising:

providing a silicon-on-insulator (SOI) substrate comprising a silicon substrate layer, an insulator layer and a silicon layer;

forming a MEMS device in the silicon layer of the SOI substrate;

forming one or more etching channels adjacent to the MEMS device;

then providing one or more cavities below the MEMS device; and

then forming one or more cavities above the MEMS device,

wherein forming the one or more etching channels comprises forming one or more sidewall etching channels in the substrate by partially etching the silicon layer at a periphery of the MEMS device.

2. The method for TFE of a MEMS device in accordance with claim 1, wherein forming the MEMS device comprising forming one or more etching channels in the MEMS device.

3. The method for TFE of a MEMS device in accordance with claim 1, wherein providing the one or more cavities below the MEMS device comprises removing the insulator layer below the MEMS device by etching the insulator layer below the MEMS device through the etching channels.

4. The method for TFE of a MEMS device in accordance with claim 1, wherein providing the one or more cavities below the MEMS device comprises providing the SOI substrate having one or more cavities pre-etched in the silicon substrate layer and the insulator layer.

5. The method for TFE of a MEMS device in accordance with claim 1, further comprising depositing a sacrificial layer over the MEMS device.

6. The method for TFE of a MEMS device in accordance with claim 5, wherein the sacrificial layer is deposited such that it covers the MEMS device, the etching channels adjacent to the MEMS device, and the sidewall etching channels.

7. The method for TFE of a MEMS device in accordance with claim 5, further comprising depositing a cap layer over the sacrificial layer.

8. The method for TFE of a MEMS device in accordance with claim 7, wherein the cap layer is deposited over the sacrificial layer to the extent that one or more exposures of the sacrificial layer are formed.

9. The method for TFE of a MEMS device in accordance with claim 8, wherein forming the one or more cavities above the MEMS device comprising providing one or more etchants to the one or more exposures of the sacrificial layer so as to remove the sacrificial layer.

10. The method for TFE of a MEMS device in accordance with claim 9, wherein the one or more etchants comprise an etch gas selected from a group comprising XeF2, V-HF and Ozone.

11. The method for TFE of a MEMS device in accordance with claim 7, further comprising providing a sealing layer over the cap layer, wherein the sealing layer extends to and sits in part on the silicon layer.