Display device and method of driving the same

• US 9,507,452 B2
• Filed: 10/03/2014
• Issued: 11/29/2016
• Est. Priority Date: 06/09/2006
• Status: Active Grant

• Current Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Original Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Inventors: Pak, Sang-Jin, Cho, Man-Seung, Uh, Kee-Han, Lee, Joo-Hyung
• Primary Examiner(s): MARINELLI, PATRICK
• Application Number:
  US14/506,055
• Publication Number:
  US 20150022477A1
• Time in Patent Office: 788 Days
• US Class Current: 1/1
• CPC Class Codes: G02F 1/13338 Input devices, e.g. touch panels
• CPC Class Codes: G02F 1/136213 Storage capacitors associated with the pixel electrode
• CPC Class Codes: G02F 1/136286 Wiring, e.g. gate line, drain line
• CPC Class Codes: G02F 1/1368 in which the switching element is a three-electrode device G02F1/136277 takes precedence
• CPC Class Codes: G06F 3/0412 Digitisers structurally integrated in a display
• CPC Class Codes: G06F 3/04184 Synchronisation with the driving of the display or the backlighting unit to avoid interferences generated internally
• CPC Class Codes: G06F 3/0443 using a single layer of sensing electrodes
• CPC Class Codes: G06F 3/0445 using two or more layers of sensing electrodes, e.g. using two layers of electrodes separated by a dielectric layer
• CPC Class Codes: G06F 3/0446 using a grid-like structure of electrodes in at least two directions, e.g. using row and column electrodes
• CPC Class Codes: G09G 2310/061 for resetting or blanking
• CPC Class Codes: G09G 3/3648 using an active matrix G09G3/367 - G09G3/3696 take precedence
• CPC Class Codes: G09G 3/3677 suitable for active matrices only
• CPC Class Codes: G09G 3/3688 suitable for active matrices only
• CPC Class Codes: G09G 3/3696 Generation of voltages supplied to electrode drivers

Abstract

A display device includes a display panel, a source driving part, a gate driving part, a readout part and a pulse generating part. The display panel includes an array substrate on which a source line and a gate line are formed, and an opposite substrate on which a common electrode is formed. The readout part is electrically connected with at least one of the lines of the array substrate and the common electrode of the opposite substrate, and reads out a detection signal during an elimination period of a frame period. The pulse generating part outputs a control pulse for driving the readout part during the elimination period. Accordingly, a detection signal is read out through lines or a common electrode that are/is formed for displaying an image, so that an aperture ratio may be increased, and a manufacturing process thereof may be simplified.

Claims

1. A display device comprising:

a display panel including an array substrate on which a source line and a gate line are formed and an opposite substrate on which a common electrode is formed;

a source driving part outputting a data signal to the source line during a display period of a frame period;

a gate driving part outputting a gate signal to the gate line during the display period;

a readout part reading out a detection signal during an elimination period of the frame period, the readout part being electrically connected with at least one of the lines of the array substrate and the common electrode of the opposite substrate, wherein the elimination period is separate from the display period; and

a pulse generating part outputting a control pulse for operating the readout part during the elimination period,

wherein a first parasitic capacitor is connected between the common electrode and the source line,

wherein a second parasitic capacitor is connected between the common electrode and the gate line,

wherein, during the elimination period, a constant direct current voltage is applied to the first parasitic capacitor, via the common electrode, to maintain the capacitance of the parasitic capacitor constant, and a gate-off voltage is applied to the second parasitic capacitor, via the gate line, to eliminate the parasitic capacitor, and

wherein, during the display period, a swing voltage is applied to the common electrode.

2. The display device of claim 1, wherein the array substrate further comprises a short circuit point electrically connected with the common electrode, and the readout part reads out the detection signal from the short circuit point.

3. The display device of claim 2, wherein the common electrode comprises a plurality of patterned electrodes, and the readout part reads out the detection signal from a plurality of short circuit points electrically connected with the plurality of patterned electrodes.

4. The display device of claim 2, wherein the source driving part outputs a direct current voltage to the source lines during the elimination period.

5. A method of driving a display device including an array substrate on which a source line and a gate line are formed and an opposite substrate on which a common electrode is formed, comprising;

displaying an image at the display device by outputting a driving signal to the source and gate lines during a display period of a frame period; and

reading out a defection signal detected at the display device from at least one of the lines of the array substrate and the common electrode of the opposite substrate during an elimination period of the frame period,

wherein the elimination period is separate from the display period,

wherein a first parasitic capacitor is connected between the common electrode and the source line,

wherein a second parasitic capacitor is connected between the common electrode and the gate line,

wherein, during the elimination period, a constant direct current voltage is applied to the first parasitic capacitor, via the common electrode, to maintain the capacitance of the parasitic capacitor constant, and a gate-off voltage is applied to the second parasitic capacitor, via the gate line, to eliminate the parasitic capacitor, and

wherein, during the display period, a swing voltage is applied to the common electrode.

6. The method of claim 5, wherein reading out the detection signal includes reading out the detection signal from a short circuit point electrically connected with the common electrode.

7. The method of claim 6, wherein reading out the detection signal further comprises outputting a direct current voltage to the source line during the elimination period when light is incident onto a bottom surface of the array substrate.