Method for managing memory apparatus, associated memory apparatus thereof and associated controller thereof
First Claim
1. A method for managing a memory apparatus, the memory apparatus comprising at least one non-volatile (NV) memory element, each of the at least one NV memory element comprising a plurality of blocks, the method being applied to a controller of the memory apparatus, the controller arranged to control the at least one NV memory element, the method comprising following steps:
- temporarily storing data received from a host device into a volatile memory in the controller and utilizing the data in the volatile memory as received data, and dynamically monitoring a data amount of the received data to determine whether to immediately write the received data into the at least one NV memory element, wherein at least one write command received from the host device indicates that the host device demands to write the data; and
when a specific signal is received and it is detected that specific data having been written into a same location in a specific block configured to be a multiple level cell (MLC) memory block within a specific NV memory element of the at least one NV memory element for at least once but less than a predetermined number of times exists in the received data, immediately writing the specific data into another block in the at least one NV memory element, to prevent the specific data from being lost, wherein the specific signal indicates that power of the controller is abnormal or the memory apparatus is going to be powered off, the predetermined number of times is larger than one, and the other block is configured as a single level cell (SLC) memory block.
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Abstract
A method for managing a memory apparatus and the associated memory apparatus thereof and the associated controller thereof are provided, where the method includes: temporarily storing data received from a host device into a volatile memory in the controller and utilizing the data in the volatile memory as received data, and dynamically monitoring the data amount of the received data to determine whether to immediately write the received data into at least one NV memory element; and when a specific signal is received and it is detected that specific data having not been written into a same location in a specific block configured to be an MLC memory block within a specific NV memory element of the at least one NV memory element for a predetermined number of times exists in the received data, immediately writing the specific data into another block in the at least one NV memory element.
14 Citations
20 Claims
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1. A method for managing a memory apparatus, the memory apparatus comprising at least one non-volatile (NV) memory element, each of the at least one NV memory element comprising a plurality of blocks, the method being applied to a controller of the memory apparatus, the controller arranged to control the at least one NV memory element, the method comprising following steps:
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temporarily storing data received from a host device into a volatile memory in the controller and utilizing the data in the volatile memory as received data, and dynamically monitoring a data amount of the received data to determine whether to immediately write the received data into the at least one NV memory element, wherein at least one write command received from the host device indicates that the host device demands to write the data; and when a specific signal is received and it is detected that specific data having been written into a same location in a specific block configured to be a multiple level cell (MLC) memory block within a specific NV memory element of the at least one NV memory element for at least once but less than a predetermined number of times exists in the received data, immediately writing the specific data into another block in the at least one NV memory element, to prevent the specific data from being lost, wherein the specific signal indicates that power of the controller is abnormal or the memory apparatus is going to be powered off, the predetermined number of times is larger than one, and the other block is configured as a single level cell (SLC) memory block. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A memory apparatus, comprising:
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at least one non-volatile (NV) memory element, each comprising a plurality of blocks; and a controller, arranged to control the at least one NV element, the controller comprising a processing unit arranged to manage the memory apparatus according to a program code embedded in the processing unit or received from outside of the processing unit, wherein the controller temporarily stores data received from a host device into a volatile memory in the controller and utilizes the data in the volatile memory as received data, and dynamically monitors a data amount of the received data to determine whether to immediately write the received data into the at least one NV memory element, wherein at least one write command received from the host device indicates that the host device demands to write the data; wherein when a specific signal is received and it is detected that specific data having been written into a same location in a specific block configured to be a multiple level cell (MLC) memory block within a specific NV memory element of the at least one NV memory element for at least once but less than a predetermined number of times exists in the received data, the controller immediately writes the specific data into another block in the at least one NV memory element, to prevent the specific data from being lost, wherein the specific signal indicates that power of the controller is abnormal or the memory apparatus is going to be powered off, the predetermined number of times is larger than one, and the other block is configured as a single level cell (SLC) memory block. - View Dependent Claims (12, 13, 14, 15)
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16. A controller of a memory apparatus, the memory apparatus comprising at least one non-volatile (NV) memory element, each of the at least one NV memory element comprising a plurality of blocks, the controller comprising:
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a processing unit, arranged to manage the memory apparatus according to a program code embedded in the processing unit or received from outside of the processing unit, wherein the controller temporarily stores data received from a host device into a volatile memory in the controller and utilizes the data in the volatile memory as received data, and dynamically monitors a data amount of the received data to determine whether to immediately write the received data into the at least one NV memory element, wherein at least one write command received from the host device indicates that the host device demands to write the data; and wherein when a specific signal is received and it is detected that specific data having been written into a same location in a specific block configured to be a multiple level cell (MLC) memory block within a specific NV memory element of the at least one NV memory element for at least once but less than a predetermined number of times exists in the received data, the controller immediately writes the specific data into another block in the at least one NV memory element, to prevent the specific data from being lost, wherein the specific signal indicates that power of the controller is abnormal or the memory apparatus is going to be powered off, the predetermined number of times is larger than one, and the other block is configured as a single level cell (SLC) memory block. - View Dependent Claims (17, 18, 19, 20)
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Specification