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Vertical slow-wave symmetric inductor structure for semiconductor devices

  • US 9,508,480 B2
  • Filed: 08/31/2011
  • Issued: 11/29/2016
  • Est. Priority Date: 08/31/2011
  • Status: Active Grant
First Claim
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1. A semiconductor device comprising an inductor structure formed on a semiconductor substrate with a planar substrate surface, said inductor structure comprising at least two flat spiral conductive structures, each of said flat spiral conductive structures formed of at least three horizontal strips of conductive material vertically separated, each of said horizontal strips having a respective horizontal area, wherein a projected horizontal area of each of said flat spiral conductive structure is equal to said horizontal area of a longest one of said strips, wherein each of said horizontal strips of conductive material comprise outer edges that are vertically aligned with each other in a direction substantially normal to said planar substrate surface, and wherein said horizontal strips of conductive material of a first of said at least two flat spiral conductive structures and said horizontal strips of conductive material of a second of said at least two flat spiral conductive structures are aligned such that a primary axis of a magnetic field of the first flat spiral conductive structure is in line with a primary axis of a magnetic field of the second flat spiral conductive structure, further comprising a shield comprising a plurality of adjacent strips extending between at least two of the horizontal strips of the first and second flat spiral structures, and wherein said plurality of adjacent strips are perpendicular to said flat spiral structures.

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