Packaging structures and methods with a metal pillar

• US 9,508,666 B2
• Filed: 10/03/2013
• Issued: 11/29/2016
• Est. Priority Date: 05/30/2011
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Yu, Chen-Hua, Jeng, Shin-Puu, Hou, Shang-Yun, Hsu, Kuo-Ching, Hsieh, Cheng-Chieh, Shih, Ying-Ching, Tsai, Po-Hao, Huang, Cheng-Lin, Lin, Jing-Cheng
• Primary Examiner(s): Tran, Minh-Loan
• Assistant Examiner(s): KHAN, FARID H
• Application Number:
  US14/045,578
• Publication Number:
  US 20140038405A1
• Time in Patent Office: 1,153 Days
• US Class Current: 1/1
• CPC Class Codes: H01L 2224/0361 Physical or chemical etching
• CPC Class Codes: H01L 2224/03912 the bump being used as a mask for patterning the bonding area
• CPC Class Codes: H01L 2224/0401 Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/05022 the internal layer being at least partially embedded in the surface
• CPC Class Codes: H01L 2224/05027 the internal layer extending out of an opening
• CPC Class Codes: H01L 2224/05073 Single internal layer
• CPC Class Codes: H01L 2224/05124 Aluminium [Al] as principal constituent
• CPC Class Codes: H01L 2224/05139 Silver [Ag] as principal constituent
• CPC Class Codes: H01L 2224/05144 Gold [Au] as principal constituent
• CPC Class Codes: H01L 2224/05147 Copper [Cu] as principal constituent
• CPC Class Codes: H01L 2224/05155 Nickel [Ni] as principal constituent
• CPC Class Codes: H01L 2224/05184 Tungsten [W] as principal constituent
• CPC Class Codes: H01L 2224/05666 Titanium [Ti] as principal constituent
• CPC Class Codes: H01L 2224/05681 Tantalum [Ta] as principal constituent
• CPC Class Codes: H01L 2224/05686 with a principal constituent of the material being a non metallic, non metalloid inorganic material
• CPC Class Codes: H01L 2224/10145 Flow barriers
• CPC Class Codes: H01L 2224/10156 Bump collar
• CPC Class Codes: H01L 2224/1146 Plating
• CPC Class Codes: H01L 2224/1147 using a lift-off mask
• CPC Class Codes: H01L 2224/1182 Applying permanent coating, e.g. in-situ coating
• CPC Class Codes: H01L 2224/11831 : involving a chemical process, e.g. etching the bump connector
• CPC Class Codes: H01L 2224/13017 : being non uniform along the bump connector
• CPC Class Codes: H01L 2224/1308 : being stacked
• CPC Class Codes: H01L 2224/13082 : Two-layer arrangements
• CPC Class Codes: H01L 2224/13083 : Three-layer arrangements
• CPC Class Codes: H01L 2224/13111 : Tin [Sn] as principal constituent
• CPC Class Codes: H01L 2224/13147 : Copper [Cu] as principal constituent
• CPC Class Codes: H01L 2224/13155 : Nickel [Ni] as principal constituent
• CPC Class Codes: H01L 2224/13164 : Palladium [Pd] as principal constituent
• CPC Class Codes: H01L 2224/13565 : Only outside the bonding interface of the bump connector
• CPC Class Codes: H01L 2224/13578 : being disposed next to each other, e.g. side-to-side arrangements
• CPC Class Codes: H01L 2224/13686 : with a principal constituent of the material being a non metallic, non metalloid inorganic material
• CPC Class Codes: H01L 2224/16058 : being non uniform along the bump connector
• CPC Class Codes: H01L 2224/16145 : the bodies being stacked
• CPC Class Codes: H01L 2224/81193 : wherein the bump connectors are disposed on both the semiconductor or solid-state body and another item or body to be connected to the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/81815 : Reflow soldering
• CPC Class Codes: H01L 23/147 : Semiconductor insulating substrates semiconductor conductive substrates H01L23/4926
• CPC Class Codes: H01L 23/49827 : Via connections through the substrates, e.g. pins going through the substrate, coaxial cables H01L23/49822, H01L23/49833, H01L23/4985, H01L23/49861 take precedence
• CPC Class Codes: H01L 24/11 : Manufacturing methods for bumps on insulating substrates H01L21/4853
• CPC Class Codes: H01L 24/13 : of an individual bump connector
• CPC Class Codes: H01L 24/16 : of an individual bump connector
• CPC Class Codes: H01L 24/81 : using a bump connector
• CPC Class Codes: H01L 25/04 : the devices not having separate containers
• CPC Class Codes: H01L 25/50 : Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00 H01L21/50 takes precedence
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/01322 : Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
• CPC Class Codes: H01L 2924/01327 : Intermediate phases, i.e. intermetallics compounds
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/049 : Nitrides composed of metals from groups of the periodic table
• CPC Class Codes: H01L 2924/04941 : TiN
• CPC Class Codes: H01L 2924/04953 : TaN
• CPC Class Codes: H01L 2924/053 : Oxides composed of metals from groups of the periodic table
• CPC Class Codes: H01L 2924/3651 : Formation of intermetallics
• CPC Class Codes: H01L 2924/3841 : Solder bridging

Abstract

A package component is free from active devices therein. The package component includes a substrate, a through-via in the substrate, a top dielectric layer over the substrate, and a metal pillar having a top surface over a top surface of the top dielectric layer. The metal pillar is electrically coupled to the through-via. A diffusion barrier is over the top surface of the metal pillar. A solder cap is disposed over the diffusion barrier.

Claims

1. A method of forming a device comprising:

forming a plurality of dielectric layers over a substrate;

forming an under-bump-metallurgy (UBM) structure in a topmost dielectric layer of the plurality of dielectric layers;

forming a first metal pillar over the substrate, the first metal pillar having a top surface disposed above a topmost dielectric layer disposed on the substrate, wherein the substrate has a through via disposed therein, wherein the first metal pillar is in electrical contact with the through via, and wherein the first metal pillar is formed over the UBM structure, and wherein the first metal pillar is in electrical contact with the through via through the UBM structure;

depositing a protection material on exposed sidewalls of the first metal pillar to form a protection layer on the sidewalls of the first metal pillar, the protection material comprising a first conductive material;

forming a first diffusion barrier layer over the top surface of the first metal pillar and over the protection layer, the first diffusion barrier layer being formed of a second material that is different than the first conductive material, the protection layer and the first diffusion barrier layer forming an interface therebetween; and

forming a solder cap over the first diffusion barrier layer.

2. The method of claim 1, wherein a thickness of the first diffusion barrier layer is greater than about 2 μ

m.

3. The method of claim 1, wherein the first diffusion barrier layer comprises nickel.

4. The method of claim 1, wherein the first diffusion barrier layer does not extend on sidewalls of the first metal pillar.

5. The method of claim 1, wherein the first diffusion barrier layer contacts the top surface of the protection layer at the interface.

6. The method of claim 1, further comprising mounting a package component on the first metal pillar, the package component having a second metal pillar at a top surface of the package component and a second diffusion barrier layer on a top surface of the second metal pillar, wherein mounting the package component comprises bonding and electrically coupling the second diffusion barrier layer to the solder cap.

7. A method comprising:

forming an interposer, the forming the interposer comprising;

forming a first pillar having a top surface over a top surface of at least one dielectric layer, the at least one dielectric layer disposed over a substrate having a through via disposed therein;

forming an under-bump-metallurgy (UBM) structure in the topmost dielectric layer of the at least one dielectric layer, wherein the first pillar is formed over the UBM structure, and wherein the first pillar is in electrical contact with the through via through the UBM structure;

forming a protection layer on sidewalls of the first pillar, while leaving the top surface of the first pillar free of the protection layer; and

forming a first diffusion barrier layer over the top surface of the first pillar and extending over a top surface of the protection layer;

forming a solder region on the first diffusion barrier layer, wherein the solder region extends on the protection layer; and

mounting a package component to the interposer by bonding a second diffusion barrier layer of the package component to the solder region, the package component having a second pillar with the second diffusion barrier layer disposed thereon.

8. The method of claim 7, further comprising forming a plurality of dielectric layers over the substrate, the plurality of dielectric layers having a plurality of conductive elements disposed therein, wherein the first pillar is formed over a topmost dielectric layer of the plurality of dielectric layers, wherein the UBM structure is in electrical contact with the conductive elements, and wherein the first pillar is in electrical contact with the through via through the conductive elements.

9. The method of claim 7, wherein the package component is a device die comprising one or more active devices.

10. The method of claim 7, wherein the solder region extends onto the sidewalls of the second pillar.

11. The method of claim 7, wherein the first diffusion barrier layer has a thickness greater than about 2 μ

m.

12. The method of claim 7, wherein the first diffusion barrier layer contacts a top surface of the protection layer.

13. The method of claim 12, wherein the protection layer extends from a top surface of the at least one dielectric layer to a bottom surface of the first diffusion barrier layer.

14. A method of forming a device comprising:

providing an interposer having a substrate with a through via disposed therein, the interposer having a top dielectric layer disposed over the substrate at a first side of the interposer, wherein providing the interposer comprises;

forming a plurality of dielectric layers over the substrate and having a plurality of conductive elements disposed therein; and

forming an under-bump-metallurgy (UBM) structure in a topmost dielectric layer of the plurality of dielectric layers and in electrical contact with the conductive elements;

forming a copper pillar on the first side of the interposer and having a top surface higher than a top surface of the top dielectric layer;

forming a protection layer extending on sidewalls of the copper pillar, wherein the protection layer is a first material comprising a first non-copper metal;

forming a diffusion barrier layer over and physically contacting the top surface of the copper pillar, wherein the diffusion barrier layer is a second material comprising a second non-copper metal, wherein the second material is different from the first material; and

forming a solder cap over and contacting the diffusion barrier layer, wherein the solder cap is electrically coupled to the through via.

15. The method of claim 14, wherein the diffusion barrier layer has a thickness greater than about 2 μ

m.

16. The method of claim 14 further comprising forming an electrical connector on a second side of the interposer opposite the first side, and wherein the electrical connector is electrically coupled to the copper pillar.

17. The method of claim 14,

wherein the copper pillar is formed over UBM structure, and wherein the copper pillar is in electrical contact with the through via through the UBM structure and the conductive elements.