Thin film transistor

• US 9,508,856 B2
• Filed: 10/15/2013
• Issued: 11/29/2016
• Est. Priority Date: 10/19/2012
• Status: Active Grant

• Current Assignee: Klaus Schmidt, Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Original Assignee: Kobe Steel Limited, Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Inventors: Koo, So Young, Tao, Hiroaki, Maeda, Takeaki, Miki, Aya, Kugimiya, Toshihiro, Ahn, Byung Du, Kim, Gun Hee
• Primary Examiner(s): Vu, David
• Application Number:
  US14/436,241
• Publication Number:
  US 20150249159A1
• Time in Patent Office: 1,141 Days
• US Class Current: 1/1
• CPC Class Codes: H01L 29/78606 with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device H01L29/78642, H01L29/78645 take precedence
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78693 the semiconducting oxide being amorphous

Abstract

Provided is a thin film transistor wherein the shape of a protrusion formed on the interface between an oxide semiconductor layer and a protection film is suitably controlled, and stable characteristics are achieved. This thin film transistor is characterized in that: the thin film transistor has an oxide semiconductor layer formed of an oxide containing at least In, Zn and Sn as metal elements, and a protection film directly in contact with the oxide semiconductor layer; and the maximum height of a protrusion formed on the oxide semiconductor layer surface directly in contact with the protection film is less than 5 nm.

Claims

1. A thin film transistor comprising an oxide semiconductor layer formed of an oxide containing at least In, Zn and Sn as metal elements, and a passivation layer in direct contact with the oxide semiconductor layer,

wherein a protrusion formed on a surface of the oxide semiconductor layer, the surface being in direct contact with the passivation layer, has a maximum height of less than 5 nm, wherein a concentration (atomic %) of a metal element in the protrusion is 0.5 to 2.0 times a concentration (atomic %) of a corresponding metal element in the oxide semiconductor layer.

2. The thin film transistor according to claim 1, wherein the metal elements comprise In, Zn and Sn.

3. The thin film transistor according to claim 2, wherein in all of the In, the Zn and the Sn,

a ratio of the In satisfies 5 atomic % or more and 70 atomic % or less,

a ratio of the Zn satisfies 30 atomic % or more and 85 atomic % or less, and

a ratio of the Sn satisfies 50 atomic % or less, excluding 0 atomic %.

4. The thin film transistor according to claim 1, wherein the metal elements comprise In, Zn, Sn and Ga.

5. The thin film transistor according to claim 4, wherein in all of the In, the Zn, the Sn and the Ga,

a ratio of the In satisfies 5 atomic % or more and 70 atomic % or less,

a ratio of the Zn satisfies 30 atomic % or more and 85 atomic % or less,

a ratio of the Sn satisfies 50 atomic % or less, excluding 0 atomic %, and

a ratio of the Ga satisfies 10 atomic % or more and 40 atomic % or less.

6. The thin film transistor according to claim 1, wherein the passivation layer comprises a silicon oxide film formed immediately above the oxide semiconductor layer by a CVD method by allowing a gas flow ratio of SiH₄ and N₂O (SiH₄/N₂O) to be 0.04 or less.