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3D semiconductor device

  • US 9,509,313 B2
  • Filed: 03/06/2011
  • Issued: 11/29/2016
  • Est. Priority Date: 04/14/2009
  • Status: Active Grant
First Claim
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1. A semiconductor device comprising:

  • a first layer comprising a multiplicity of first transistors implementing a plurality of first combinatorial logic functions;

    a second layer above or below the first layer comprising a multiplicity of second transistors implementing a plurality of second combinatorial logic functions;

    each of said first combinatorial logic functions constructed by said first transistors is replaceable by at least one of said second combinatorial logic functions constructed by said second transistors; and

    a plurality of connection paths between said first layer and said second layer,wherein each of said connection paths comprise a through layer via,wherein said through layer via has a radius of less than 200 nm, andwherein said through layer via is through one of said first layer or said second layer.

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