Method of manufacturing an image sensor using multiple exposures

• US 9,515,117 B2
• Filed: 06/03/2015
• Issued: 12/06/2016
• Est. Priority Date: 06/05/2014
• Status: Active Grant

• Current Assignee: Renesas Electronics Corporation
• Original Assignee: Renesas Electronics Corporation
• Inventors: Kimura, Masatoshi
• Primary Examiner(s): Parker, Allen
• Assistant Examiner(s): RAMALLO, GUSTAVO G
• Application Number:
  US14/729,279
• Publication Number:
  US 20150357368A1
• Time in Patent Office: 552 Days
• US Class Current: 1/1
• CPC Class Codes: H01L 27/14603 Special geometry or disposition of pixel-elements, address-lines or gate-electrodes
• CPC Class Codes: H01L 27/14605 Structural or functional details relating to the position of the pixel elements, e.g. smaller pixel elements in the center of the imager compared to pixel elements at the periphery
• CPC Class Codes: H01L 27/14612 involving a transistor
• CPC Class Codes: H01L 27/14621 Colour filter arrangements
• CPC Class Codes: H01L 27/14627 Microlenses
• CPC Class Codes: H01L 27/1463 Pixel isolation structures
• CPC Class Codes: H01L 27/14636 Interconnect structures
• CPC Class Codes: H01L 27/14641 Electronic components shared by two or more pixel-elements, e.g. one amplifier shared by two pixel elements
• CPC Class Codes: H01L 27/14643 Photodiode arrays; MOS imagers
• CPC Class Codes: H01L 27/14645 Colour imagers
• CPC Class Codes: H01L 27/14689 MOS based technologies

Abstract

The performance of a solid state image sensor which is formed by performing divided exposure that exposes the entire chip by a plurality of times of exposure and in which each of a plurality of pixels arranged in a pixel array portion has a plurality of photodiodes is improved.

In the divided exposure performed when the solid state image sensor is manufactured, a dividing line that divides an exposure region is defined to be located between a first photodiode and a second photodiode aligned in a first direction in an active region in a pixel and is defined to be along a second direction perpendicular to the first direction.

Claims

1. A manufacturing method of a semiconductor device including a solid state image sensor having a plurality of first and second pixels, each second pixel having a first photodiode and a second photodiode, the manufacturing method comprising:

(a) preparing a substrate including a first region and a second region adjacent to each other along an upper surface of the substrate;

(b) forming a photoresist film over the substrate;

(c) exposing the photoresist film in the first region;

(d) after (c), separately exposing the photoresist film in the second region;

(e) after (c) and (d), patterning the photoresist film by developing the photoresist film;

(f) forming an element isolation structure, which partitions active regions in the first and second pixels in the substrate, over the substrate by using the photoresist film patterned in (e); and

(g) after (f), for each second pixel, forming the first photodiode in the first region and forming the second photodiode in the second region by introducing impurities into the upper surface of the substrate in the respective active region,

wherein the first photodiode is on an opposite side of a boundary line between the first region and the second region from the second photodiode in plan view, and

the boundary line is defined by the exposings of (c) and (d).

2. The manufacturing method of a semiconductor device according to claim 1,

wherein the first and second photodiodes are formed to have a same active region layout in plan view, and

the first photodiode is formed so as to be shifted from the second photodiode along a direction parallel to the boundary line in plan view.

3. The manufacturing method of a semiconductor device according to claim 2,

wherein the exposings of (c) and (d) are such that a periphery of the active region for each second pixel has stepped portions in plan view at the boundary line between the first region and the second region.

4. The manufacturing method of a semiconductor device according to claim 1,

wherein the boundary line extends along a first direction along a main surface of the substrate,

a plurality of the first pixels are arranged along a second direction which is perpendicular to the first direction and which is along the main surface of the substrate,

each first pixel being spaced from the boundary line in plan view, and

a distance between the first photodiode and the second photodiode of each second pixel in plan view is greater than a distance between a third photodiode and a fourth photodiode of each first pixel in plan view.

5. The manufacturing method of a semiconductor device according to claim 4,

wherein a width of the first photodiode along the second direction of each second pixel in plan view is smaller than a width of the third photodiode along the second direction of each first pixel in plan view.

6. The manufacturing method of a semiconductor device according to claim 5,

wherein a width of the second photodiode along the second direction of each second pixel in plan view is smaller than a width of the fourth photodiode along the second direction of each first pixel in plan view.

7. A manufacturing method of a semiconductor device including a solid state image sensor having a plurality of first and second pixels, each second pixel having a first photodiode and a second photodiode, the manufacturing method comprising:

(a) preparing a substrate including a first region and a second region adjacent to each other along an upper surface of the substrate;

(b) forming a photoresist film over the substrate;

(c) exposing the photoresist film in the first region;

(d) after (c), separately exposing the photoresist film in the second region;

(e) after (c) and (d), patterning the photoresist film by developing the photoresist film;

(f) forming an element isolation structure, which partitions active regions in the first and second pixels in the substrate, over the substrate by using the photoresist film patterned in (e); and

(g) after (f), for each second pixel, forming the first photodiode and the second photodiode such that at least portions thereof are aligned along a main surface of the substrate, by introducing impurities into the upper surface of the substrate in the respective active region,

wherein a dividing line between the first region and the second region overlaps with the first photodiode and extends in a longitudinal direction of the first photodiode in plan view, and

the dividing line is defined by the exposings of (c) and (d).

8. The manufacturing method of a semiconductor device according to claim 7,

wherein the first and second photodiode are formed to have a same active region layout in plan view,

the first photodiode is formed so as to be shifted from the second photodiode along a direction parallel to the dividing line in plan view, and

the exposings of (c) and (d) are such that a periphery of the active region for each second pixel has stepped portions in plan view at said dividing line.

9. A manufacturing method comprising:

forming a photoresist film over a surface of a semiconductor substrate;

exposing a first portion of the photoresist film, the first portion being in a first region over the surface of the substrate;

after the exposing the first portion, separately exposing a second portion of the photoresist film, the second portion being in a second region over the surface of the substrate, the second region bordering the first region in plan view along a dividing line;

after the exposing the first and second portions, patterning the photoresist film by developing the exposed portions of the photoresist film; and

using the patterned photoresist film, forming at least one pixel that overlaps the dividing line in plan view,

wherein each pixel comprises a first photodiode in the first region and a second photodiode in the second region, and

the first and second photodiodes are on opposite sides of the dividing line in plan view.

10. The manufacturing method of claim 9, wherein the forming at least one pixel comprises:

forming an element isolation structure over the substrate using the patterned photoresist film;

defining an active region for each pixel using the element isolation structure; and

introducing impurities into the surface of the substrate in each defined active region to form the first and second photodiodes.

11. The manufacturing method of claim 9, wherein

the first and second photodiodes are formed to have a same active region layout in plan view, and

the first photodiode is formed so as to be shifted from the second photodiode along a direction parallel to the dividing line in plan view.

12. The manufacturing method of claim 11, wherein a periphery of the active region for each pixel has stepped portions in plan view at the dividing line.

13. The manufacturing method of claim 9, wherein, in plan view, the dividing line overlaps a p-type well region of the at least one pixel and is spaced from n-type regions disposed within said p-type well region of the at least one pixel.

14. The manufacturing method of claim 9, comprising:

using the patterned photoresist film forming additional pixels in at least one of the first and second regions, the additional pixels being spaced from the dividing line along a first direction perpendicular to the dividing line, each additional pixel having third and fourth photodiodes,

wherein for each additional pixel, an active region layout of the third photodiode is the same as an active region layout of the fourth photodiode, and

the third and fourth photodiodes are aligned along a second direction parallel to the dividing line.