Shielded trench semiconductor devices and related fabrication methods

• US 9,515,178 B1
• Filed: 09/10/2015
• Issued: 12/06/2016
• Est. Priority Date: 09/10/2015
• Status: Active Grant

• Current Assignee: NXP USA, Inc. (NXP Semiconductors NV)
• Original Assignee: Freescale Semiconductor, Inc. (NXP Semiconductors NV)
• Inventors: Qin, Ganming, Zitouni, Moaniss
• Primary Examiner(s): Sandvik, Benjamin
• Application Number:
  US14/850,486
• Time in Patent Office: 453 Days
• Field of Search: None
• US Class Current: 1/1
• CPC Class Codes: H01L 29/0696 of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
• CPC Class Codes: H01L 29/086 Impurity concentration or distribution
• CPC Class Codes: H01L 29/1095 Body region, i.e. base region, of DMOS transistors or IGBTs cell layout H01L29/0696
• CPC Class Codes: H01L 29/407 Recessed field plates, e.g. trench field plates, buried field plates
• CPC Class Codes: H01L 29/66734 with a step of recessing the gate electrode, e.g. to form a trench gate electrode
• CPC Class Codes: H01L 29/7811 with an edge termination structure guard regions per se H01L29/0619; field plates per se H01L29/402
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236

Abstract

Semiconductor device structures and related fabrication methods are provided. An exemplary semiconductor device includes gate structures within a semiconductor substrate, a shielding structure within the semiconductor substrate that includes a first portion underlying a first gate structure and a second portion proximate an end of the gate structures, and a conductive structure overlying the second portion of the shielding structure and an end region of the semiconductor substrate. The conductive structure provides an electrical connection between the second portion of the shielding structure and the end region of the semiconductor substrate residing between the gate structures proximate the end of the gate structures.

Claims

1. A semiconductor device comprising:

a plurality of gate structures within a semiconductor substrate, the plurality of gate structures being aligned in a first direction;

a shielding structure within the semiconductor substrate, the shielding structure including a first portion underlying a first gate structure of the plurality of gate structures and a second portion proximate a longitudinal end of the plurality of gate structures;

a body contact region in the semiconductor substrate residing between the plurality of gate structures and extending from the longitudinal end toward an interior portion of the semiconductor substrate;

a conductive structure overlying the second portion of the shielding structure and a longitudinal end region of the body contact region of the semiconductor substrate residing between the plurality of gate structures proximate the longitudinal end of the plurality of gate structures, wherein the conductive structure provides an electrical connection between the second portion and the longitudinal end region of the body contact region; and

a source conductive structure overlying an interior end portion of the body contact region, wherein the interior end portion of the body contact region is electrically connected to the source conductive structure.

2. The semiconductor device of claim 1, further comprising a source contact region in the semiconductor substrate, wherein the source conductive structure provides a second electrical connection between the interior end portion of the body contact region and the source contact region.

3. The semiconductor device of claim 2, wherein the body contact region resides between the source contact region and the second portion of the shielding structure.

4. The semiconductor device of claim 3, further comprising a third conductive structure having at least a third portion residing between the conductive structure and the source conductive structure, wherein the third conductive structure provides a third electrical connection between the plurality of gate structures.

5. The semiconductor device of claim 4, wherein the conductive structure does not extend beyond a perimeter of a diced portion of the semiconductor substrate, the diced portion including the plurality of gate structures, the shielding structure, the body contact region, and the source contact region formed therein.

6. The semiconductor device of claim 2, wherein the body contact region and the source contact region have opposite conductivities.

7. The semiconductor device of claim 2, wherein the body contact region resides between the source contact region and the second portion in the first direction.

8. The semiconductor device of claim 2, further comprising a third conductive structure having at least a third portion residing between the conductive structure and the source conductive structure, wherein the third conductive structure provides a third electrical connection between the plurality of gate structures.

9. The semiconductor device of claim 2, further comprising a body region of semiconductor material having a first conductivity type within the semiconductor substrate, wherein:

the body contact region abuts the body region and has the first conductivity type; and

the source contact region abuts the body region and has a second conductivity type opposite the first conductivity type.

10. The semiconductor device of claim 1, further comprising a buried body region within the semiconductor substrate, wherein the body contact region and the conductive structure provide the electrical connection between the buried body region and the second portion of the shielding structure.

11. The semiconductor device of claim 10, further comprising a link region between the buried body region and the body contact region, the link region having the same conductivity type as the buried body region and the body contact region to provide a second electrical connection between the buried body region and the body contact region.

12. The semiconductor device of claim 11, wherein the link region abuts the body contact region and the buried body region.

13. The semiconductor device of claim 1, wherein the first portion and the second portion of the shielding structure are integral.

14. The semiconductor device of claim 1, wherein the plurality of gate structures are insulated from the shielding structure.

15. The semiconductor device of claim 1, wherein the conductive structure does not extend beyond a perimeter of a diced portion of the semiconductor substrate, the diced portion including the plurality of gate structures and the shielding structure formed therein.

16. A vertical transistor device comprising:

a drain region of semiconductor material having a first conductivity type within a semiconductor substrate;

a plurality of trench gate structures within the semiconductor substrate overlying the drain region and having longitudinal axes aligned in a first direction;

a shielding structure within the semiconductor substrate and insulated from the plurality of trench gate structures, the shielding structure including;

gate shielding portions residing vertically between respective trench gate structures of the plurality of trench gate structures and the drain region; and

a termination portion orthogonal to the longitudinal axes of the plurality of trench gate structures proximate a longitudinal end of the plurality of trench gate structures;

body contact regions within the end regions of the semiconductor substrate and extending from the longitudinal end to an interior portion of the semiconductor substrate;

source contact regions within the interior portion of the semiconductor substrate;

a conductive structure overlying the termination portion and longitudinal end regions of the body contact regions of the semiconductor substrate residing between the plurality of trench gate structures proximate the longitudinal end of the plurality of trench gate structures, wherein the conductive structure is electrically connected to the termination portion and the longitudinal end regions of the body contact regions; and

a second conductive structure overlying interior portions of the body contact regions and source contact regions in the semiconductor substrate between the plurality of trench gate structures, wherein the second conductive structure provides a second electrical connection between the interior portions of the body contact regions and the source contact regions.

17. The vertical transistor device of claim 16, further comprising a third conductive structure having at least a first portion residing between the conductive structure and the second conductive structure, wherein the third conductive structure provides a third electrical connection between the plurality of trench gate structures.

18. A method of fabricating a semiconductor device on a substrate of semiconductor material, the method comprising:

forming a shielding structure within the substrate, the shielding structure comprising a plurality of gate shielding portions aligned in a first direction and a termination portion proximate an end of the plurality of gate shielding portions;

forming a plurality of gate structures aligned in the first direction within the substrate overlying the plurality of gate shielding portions;

forming a body contact region in an end region of the substrate, the end region residing between the plurality of gate structures proximate the termination portion of the shielding structure and extending from a longitudinal end toward an interior region of the substrate;

forming a conductive structure overlying the termination portion of the shielding structure and the longitudinal end of the body contact region, wherein the conductive structure provides an electrical connection between the termination portion and the longitudinal end of the body contact region; and

forming a source conductive structure overlying an interior end portion of the body contact region, wherein the interior end portion of the body contact region is electrically connected to the source conductive structure.

19. The method of claim 18, further comprising:

forming a source contact region in the interior region of the substrate residing between the plurality of gate structures, wherein the second conductive structure overlies the source contact region and provides a second electrical connection between the body contact region and the source contact region.

20. The method of claim 18, further comprising:

forming a buried body region having a first conductivity type in the substrate between the plurality of gate structures; and

forming a link region having the first conductivity type in the end region of the substrate overlying and abutting the buried body region, wherein;

forming the body contact region comprises forming the body contact region having the first conductivity type abutting the link region; and

the conductive structure provides the electrical connection between the buried body region and the termination portion via the body contact region and the link region.