Semiconductor substrate, semiconductor device and method of manufacturing the semiconductor device

• US 9,520,286 B2
• Filed: 05/02/2014
• Issued: 12/13/2016
• Est. Priority Date: 05/31/2013
• Status: Active Grant

• Current Assignee: Sanken Electric Company Limited, Shin-Etsu Handotai Co., Ltd. (Shin-Etsu Chemical Company Limited)
• Original Assignee: Sanken Electric Company Limited, Shin-Etsu Handotai Co., Ltd. (Shin-Etsu Chemical Company Limited)
• Inventors: Sato, Ken, Goto, Hirokazu, Shikauchi, Hiroshi, Shinomiya, Masaru, Tsuchiya, Keitaro, Hagimoto, Kazunori
• Primary Examiner(s): Wilson, Allan R
• Application Number:
  US14/892,034
• Publication Number:
  US 20160111273A1
• Time in Patent Office: 956 Days
• US Class Current: 1/1
• CPC Class Codes: H01L 21/02378 Silicon carbide
• CPC Class Codes: H01L 21/02381 Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/02458 Nitrides
• CPC Class Codes: H01L 21/02507 Alternating layers, e.g. superlattice
• CPC Class Codes: H01L 21/0251 Graded layers
• CPC Class Codes: H01L 21/0254 Nitrides
• CPC Class Codes: H01L 29/1075 of field-effect transistors
• CPC Class Codes: H01L 29/157 Doping structures, e.g. doping superlattices, nipi superlattices delta doping in general H01L29/365
• CPC Class Codes: H01L 29/2003 Nitride compounds
• CPC Class Codes: H01L 29/205 in different semiconductor regions , e.g. heterojunctions
• CPC Class Codes: H01L 29/36 characterised by the concentration or distribution of impurities in the bulk material within semiconductor regions H01L29/06
• CPC Class Codes: H01L 29/66462 with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
• CPC Class Codes: H01L 29/7786 with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT
• CPC Class Codes: H01L 29/7787 with wide bandgap charge-carrier supplying layer, e.g. direct single heterostructure MODFET

Abstract

A semiconductor substrate having a silicon-based substrate, a buffer layer provided on the silicon-based substrate and made of a nitride semiconductor containing boron, and an operation layer formed on the buffer layer, wherein a concentration of boron in the buffer layer gradually decreasing toward a side of the operation layer from a side of the silicon-based substrate. Thereby, the semiconductor substrate in which the buffer layer contains boron sufficient to obtain a dislocation suppression effect and boron is not diffused to the operation layer is provided.

Claims

1. A semiconductor substrate comprising:

a silicon-based substrate;

a buffer layer provided on the silicon-based substrate and comprised of a nitride semiconductor containing boron; and

an operation layer formed on the buffer layer,

wherein the buffer layer has a stacked body comprising of three or more layers, and

a concentration of boron in the stacked body gradually decreases toward a side of the operation layer from a side of the silicon-based substrate.

2. The semiconductor substrate according to claim 1,

wherein a concentration of boron in a region at a side of the operation layer in the buffer layer is less than 5×

10¹⁶ atoms/cm³.

3. The semiconductor substrate according to claim 1,

wherein the buffer layer is stacked such that a first layer comprised of Al_yGa_1-yN and a second layer comprised of Al_xGa_1-xN(0≦

x≦

y≦

1) are repeatedly stacked.

4. The semiconductor substrate according to claim 2,

wherein the buffer layer is stacked such that a first layer comprised of Al_yGa_1-yN and a second layer comprised of Al_xGa_1-xN(0≦

x≦

y≦

1) are repeatedly stacked.

5. The semiconductor substrate according to claim 1,

wherein a concentration of boron of the silicon-based substrate is higher than a concentration of boron in a region at a side of the silicon-based substrate in the buffer layer.

6. The semiconductor substrate according to claim 2,

wherein a concentration of boron of the silicon-based substrate is higher than a concentration of boron in a region at a side of the silicon-based substrate in the buffer layer.

7. The semiconductor substrate according to claim 3,

wherein a concentration of boron of the silicon-based substrate is higher than a concentration of boron in a region at a side of the silicon-based substrate in the buffer layer.

8. The semiconductor substrate according to claim 4,

wherein a concentration of boron of the silicon-based substrate is higher than a concentration of boron in a region at a side of the silicon-based substrate in the buffer layer.

9. A semiconductor device comprising:

the semiconductor substrate according to claim 1;

a first electrode formed on the operation layer; and

a second electrode formed on the operation layer,

wherein the first electrode and the second electrode are disposed such that a current flows from the first electrode to the second electrode via the operation layer.

10. A semiconductor device comprising:

the semiconductor substrate according to claim 2;

a first electrode formed on the operation layer; and

a second electrode formed on the operation layer,

wherein the first electrode and the second electrode are disposed such that a current flows from the first electrode to the second electrode via the operation layer.

11. A semiconductor device comprising:

the semiconductor substrate according to claim 3;

a first electrode formed on the operation layer; and

a second electrode formed on the operation layer,

wherein the first electrode and the second electrode are disposed such that a current flows from the first electrode to the second electrode via the operation layer.

12. A semiconductor device comprising:

the semiconductor substrate according to claim 4;

a first electrode formed on the operation layer; and

a second electrode formed on the operation layer,

wherein the first electrode and the second electrode are disposed such that a current flows from the first electrode to the second electrode via the operation layer.

13. A semiconductor device comprising:

the semiconductor substrate according to claim 5;

a first electrode formed on the operation layer; and

a second electrode formed on the operation layer,

wherein the first electrode and the second electrode are disposed such that a current flows from the first electrode to the second electrode via the operation layer.

14. A method of manufacturing a semiconductor device comprising:

forming a buffer layer comprised of a nitride semiconductor on a silicon-based substrate, the buffer layer having a stacked body comprising of three or more layers; and

forming an operation layer on the buffer layer,

wherein the step of forming the buffer layer comprises a stage in which boron is introduced into the buffer layer such that a concentration of boron in the buffer layer gradually decreases toward a side of the operation layer from a side of the silicon-based substrate.

15. The method of manufacturing the semiconductor device according to claim 14, wherein the stage in which boron is introduced into the buffer layer comprises a stage in which boron is diffused in the buffer layer from the silicon-based substrate in which boron is doped by thermal diffusion.

16. The method of manufacturing the semiconductor device according to claim 14, wherein the stage in which boron is introduced into the buffer layer comprises a stage in which boron is doped from a vapor phase by introducing dopant gas when the buffer layer is formed by vapor phase epitaxial growth.

17. The method of manufacturing the semiconductor device according to claim 15, wherein the stage in which boron is introduced into the buffer layer comprises a stage in which boron is doped from a vapor phase by introducing dopant gas when the buffer layer is formed by vapor phase epitaxial growth.

18. The method of manufacturing the semiconductor device according to claim 14,

wherein a stacked body in which a first layer comprised of Al_yGa_1-yN and a second layer comprised of Al_xGa_1-xN(0≦

x≦

y≦

1) are repeatedly stacked is formed as the buffer layer, and

both of the first layer and the second layer contain the boron.

19. The method of manufacturing the semiconductor device according to claim 15,

wherein a stacked body in which a first layer comprised of Al_yGa_1-yN and a second layer comprised of Al_xGa_1-xN(0≦

x≦

y≦

1) are repeatedly stacked is formed as the buffer layer, and

both of the first layer and the second layer contain the boron.

20. The method of manufacturing the semiconductor device according to claim 14,

wherein a concentration of boron of the silicon-based substrate is made higher than a concentration of boron in a region at a side of the silicon-based substrate in the buffer layer.