Configurable interposer

• US 9,524,930 B2
• Filed: 01/29/2014
• Issued: 12/20/2016
• Est. Priority Date: 11/16/2009
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Gluschenkov, Oleg, Song, Yunsheng, Ting, Tso-Hui, Wang, Ping-Chuan
• Primary Examiner(s): Smith, Zandra
• Assistant Examiner(s): Stevenson, Andre C
• Application Number:
  US14/167,240
• Publication Number:
  US 20140145351A1
• Time in Patent Office: 1,056 Days
• US Class Current: 1/1
• CPC Class Codes: H01L 21/486 Via connections through the substrate with or without pins
• CPC Class Codes: H01L 22/20 Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
• CPC Class Codes: H01L 2224/0401 Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/0603 Bonding areas having different sizes, e.g. different heights or widths
• CPC Class Codes: H01L 2224/1403 Bump connectors having different sizes, e.g. different diameters, heights or widths
• CPC Class Codes: H01L 2225/06517 Bump or bump-like direct electrical connections from device to substrate
• CPC Class Codes: H01L 2225/06541 Conductive via connections through the device, e.g. vertical interconnects, through silicon via [TSV]
• CPC Class Codes: H01L 2225/06572 Auxiliary carrier between devices, the carrier having an electrical connection structure
• CPC Class Codes: H01L 2225/06596 Structural arrangements for testing
• CPC Class Codes: H01L 23/13 characterised by the shape
• CPC Class Codes: H01L 23/481 Internal lead connections, e.g. via connections, feedthrough structures
• CPC Class Codes: H01L 23/49827 Via connections through the substrates, e.g. pins going through the substrate, coaxial cables H01L23/49822, H01L23/49833, H01L23/4985, H01L23/49861 take precedence
• CPC Class Codes: H01L 24/16 of an individual bump connector
• CPC Class Codes: H01L 24/17 of a plurality of bump connectors
• CPC Class Codes: H01L 25/0657 Stacked arrangements of devices
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/014 Solder alloys
• CPC Class Codes: H01L 2924/1301 Thyristor
• CPC Class Codes: H01L 2924/1305 Bipolar Junction Transistor [BJT]
• CPC Class Codes: H01L 2924/15311 being a ball array, e.g. BGA
• CPC Class Codes: H05K 1/0286 : Programmable, customizable or modifiable circuits by programmable non-printed jumper connections H05K3/222
• CPC Class Codes: H05K 1/142 : Arrangements of planar printed circuit boards in the same plane, e.g. auxiliary printed circuit insert mounted in a main printed circuit
• CPC Class Codes: H05K 2201/2018 : Presence of a frame in a printed circuit or printed circuit assembly
• CPC Class Codes: H05K 2203/1572 : Processing both sides of a PCB by the same process; Providing a similar arrangement of components on both sides; Making interlayer connections from two sides
• CPC Class Codes: Y10T 29/49117 : Conductor or circuit manufacturing

Abstract

A modularized interposer includes a plurality of interposer units that are assembled to provide a complete set of electrical connections between two semiconductor chips. At least some of the plurality of interposer units can be replaced with other interposer units having an alternate configuration to enable selection of different functional parts of semiconductor chips to be connected through the modularized interposer. Bonding structures, connected to conductive metal pads located at peripheries of neighboring interposer units and an overlying or underlying portion of a semiconductor chip, can provide electrical connections between the neighboring interposer units. The interposer units can be provided by forming through-substrate vias (TSV'"'"'s) in a substrate, forming patterned conductive structures on the substrate, and cutting the substrate into interposers.

Claims

1. A semiconductor structure comprising:

an array of interposer units, wherein at least one interposer unit in said array is conductively connected to a first semiconductor chip and a second semiconductor chip, and each interposer unit in said array is not of integral construction with any other interposer unit in said array;

first solder balls and second solder balls, wherein each of said first solder balls contacts a lower contact pad of an interposer unit and a first contact pad of said first semiconductor chip, and each of said second solder balls contacts an upper contact pad of said interposer unit and a second contact pad of said second semiconductor chip; and

a contiguous molding compound structure encapsulating said array of interposer units, wherein each of said first solder balls and said second solder balls and each of said at least one interposer units in said array of interposer units are embedded entirely in said contiguous molding compound structure.

2. The semiconductor structure of claim 1, wherein an interposer unit in said array includes a through-substrate via (TSV) structure embedded in an interposer substrate, an upper contact pad located on one side of said interposer substrate, and a lower contact pad located on another side of said interposer substrate.

3. The semiconductor structure of claim 1, wherein said interposer unit in said array further includes a conductive metal line contacting said upper contact pad and one end of said TSV structure.

4. The semiconductor structure of claim 1, wherein at least one interposer unit among said array of interposer units includes no more than one TSV structure.

5. The semiconductor structure of claim 1, further comprising a third solder ball contacting an upper contact pad located on an interposer unit, another upper contact pad located on another interposer unit, and a third contact pad located on said second semiconductor chip.

6. The semiconductor structure of claim 5, wherein said third solder ball forms a conductive path between said interposer unit and said another interposer unit.

7. The semiconductor structure of claim 1, wherein said contiguous molding compound structure comprises a composite material.

8. The semiconductor structure of claim 7, wherein said composite material is selected from an expoxy resin, a phonlic hardener, a silica, a catalyst, or a pigment.

9. The semiconductor structure of claim 3, wherein said interposer units in said array includes further comprises a dielectric material layer contacting a top surface of said interposer substrate.

10. The semiconductor structure of claim 9, wherein each conductive metal line is embedded in said dielectric material layer.

11. The semiconductor structure of claim 1, wherein each of said interposer units in said array includes have a coplanar top surface and a coplanar bottom surface.