Cu pillar bump with L-shaped non-metal sidewall protection structure

• US 9,524,945 B2
• Filed: 05/18/2010
• Issued: 12/20/2016
• Est. Priority Date: 05/18/2010
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Hwang, Chien Ling, Wu, Yi-Wen, Liu, Chung-Shi
• Primary Examiner(s): Lee, Jae
• Application Number:
  US12/781,987
• Publication Number:
  US 20110285011A1
• Time in Patent Office: 2,408 Days
• US Class Current: 1/1
• CPC Class Codes: H01L 2224/0345 Physical vapour deposition [PVD], e.g. evaporation, or sputtering
• CPC Class Codes: H01L 2224/0401 Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/05611 Tin [Sn] as principal constituent
• CPC Class Codes: H01L 2224/05639 Silver [Ag] as principal constituent
• CPC Class Codes: H01L 2224/05644 Gold [Au] as principal constituent
• CPC Class Codes: H01L 2224/05647 Copper [Cu] as principal constituent
• CPC Class Codes: H01L 2224/05671 Chromium [Cr] as principal constituent
• CPC Class Codes: H01L 2224/10126 Bump collar
• CPC Class Codes: H01L 2224/10145 Flow barriers
• CPC Class Codes: H01L 2224/11019 for protecting parts during the process
• CPC Class Codes: H01L 2224/1145 Physical vapour deposition [PVD], e.g. evaporation, or sputtering
• CPC Class Codes: H01L 2224/11452 Chemical vapour deposition [CVD], e.g. laser CVD
• CPC Class Codes: H01L 2224/11462 Electroplating
• CPC Class Codes: H01L 2224/11464 Electroless plating
• CPC Class Codes: H01L 2224/11622 Photolithography
• CPC Class Codes: H01L 2224/11849 Reflowing
• CPC Class Codes: H01L 2224/1308 being stacked
• CPC Class Codes: H01L 2224/13083 Three-layer arrangements
• CPC Class Codes: H01L 2224/13111 Tin [Sn] as principal constituent
• CPC Class Codes: H01L 2224/13139 Silver [Ag] as principal constituent
• CPC Class Codes: H01L 2224/13144 : Gold [Au] as principal constituent
• CPC Class Codes: H01L 2224/13147 : Copper [Cu] as principal constituent
• CPC Class Codes: H01L 2224/13155 : Nickel [Ni] as principal constituent
• CPC Class Codes: H01L 2224/13164 : Palladium [Pd] as principal constituent
• CPC Class Codes: H01L 2224/13166 : Titanium [Ti] as principal constituent
• CPC Class Codes: H01L 2224/13181 : Tantalum [Ta] as principal constituent
• CPC Class Codes: H01L 2224/13552 : comprising protrusions or indentations
• CPC Class Codes: H01L 2224/13565 : Only outside the bonding interface of the bump connector
• CPC Class Codes: H01L 2224/1357 : Single coating layer
• CPC Class Codes: H01L 2224/13575 : Plural coating layers
• CPC Class Codes: H01L 2224/13686 : with a principal constituent of the material being a non metallic, non metalloid inorganic material
• CPC Class Codes: H01L 2224/1369 : with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
• CPC Class Codes: H01L 2224/16145 : the bodies being stacked
• CPC Class Codes: H01L 2224/16225 : the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/16227 : the bump connector connecting to a bond pad of the item
• CPC Class Codes: H01L 2224/81193 : wherein the bump connectors are disposed on both the semiconductor or solid-state body and another item or body to be connected to the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/814 : with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
• CPC Class Codes: H01L 2224/81447 : Copper [Cu] as principal constituent
• CPC Class Codes: H01L 2224/81815 : Reflow soldering
• CPC Class Codes: H01L 24/05 : of an individual bonding area
• CPC Class Codes: H01L 24/11 : Manufacturing methods for bumps on insulating substrates H01L21/4853
• CPC Class Codes: H01L 24/13 : of an individual bump connector
• CPC Class Codes: H01L 24/16 : of an individual bump connector
• CPC Class Codes: H01L 24/81 : using a bump connector
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01012 : Magnesium [Mg]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01019 : Potassium [K]
• CPC Class Codes: H01L 2924/01023 : Vanadium [V]
• CPC Class Codes: H01L 2924/01024 : Chromium [Cr]
• CPC Class Codes: H01L 2924/01025 : Manganese [Mn]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/0103 : Zinc [Zn]
• CPC Class Codes: H01L 2924/01032 : Germanium [Ge]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01038 : Strontium [Sr]
• CPC Class Codes: H01L 2924/0104 : Zirconium [Zr]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/01049 : Indium [In]
• CPC Class Codes: H01L 2924/0105 : Tin [Sn]
• CPC Class Codes: H01L 2924/01073 : Tantalum [Ta]
• CPC Class Codes: H01L 2924/01075 : Rhenium [Re]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/01322 : Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/0504 : 14th Group
• CPC Class Codes: H01L 2924/07025 : Polyimide
• CPC Class Codes: H01L 2924/1305 : Bipolar Junction Transistor [BJT]
• CPC Class Codes: H01L 2924/1306 : Field-effect transistor [FET]
• CPC Class Codes: H01L 2924/13091 : Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/1421 : RF devices
• CPC Class Codes: H01L 2924/1431 : Logic devices
• CPC Class Codes: H01L 2924/1437 : Static random-access memory [SRAM]
• CPC Class Codes: H01L 2924/384 : Bump effects
• CPC Class Codes: H01L 2924/3841 : Solder bridging

Abstract

An L-shaped sidewall protection process is used for Cu pillar bump technology. The L-shaped sidewall protection structure is formed of at least one of non-metal material layers, for example a dielectric material layer, a polymer material layer or combinations thereof.

Claims

1. An integrated circuit device, comprising:

a bump structure formed on a semiconductor substrate, wherein the bump structure comprises a top surface and a sidewall surface, the bump structure further comprises a solder layer, and the semiconductor substrate comprises a surface region adjacent to the sidewall surface of the bump structure; and

an L-shaped protection structure covering the sidewall surface of the bump structure and extending to the surface region of the semiconductor substrate,

wherein the L-shaped protection structure is formed of a non-metal material layer, and the L-shaped protection structure has an upper surface that is higher than the top surface of the bump structure.

2. The integrated circuit device of claim 1, wherein the L-shaped protection structure comprises a silicon nitride layer.

3. The integrated circuit device of claim 1, wherein the L-shaped protection structure comprises a polyimide layer.

4. The integrated circuit device of claim 1, wherein the L-shaped protection structure comprises at least one of a dielectric layer, a polymer layer or combinations thereof.

5. The integrated circuit device of claim 1, wherein the bump structure comprises a conductive pillar.

6. The integrated circuit device of claim 5, wherein the conductive pillar is a copper pillar.

7. The integrated circuit device of claim 5, wherein the bump structure comprises a cap layer on the conductive pillar, and the cap layer is between the conductive pillar and the solder layer.

8. The integrated circuit device of claim 7, wherein the cap layer comprises a nickel layer.

20. The integrated circuit of claim 1, wherein the bump structure further comprises an under bump metallurgy (UBM) layer, the UBM layer comprising:

a diffusion barrier layer on the semiconductor substrate; and

a seed layer over the diffusion barrier layer.

9. A packaging assembly, comprising:

a first substrate;

a bump structure formed on the first substrate, wherein the bump structure comprises an under-bump-metallurgy (UBM) layer formed on the first substrate, a copper pillar formed on the UBM layer, and a solder layer on the copper pillar, and the bump structure has a sidewall surface adjacent to a surface region of the first substrate;

an L-shaped protection structure covering the sidewall surface of the bump structure and extending to the surface region of the first substrate, wherein the L-shaped protection structure is formed of a non-metal material layer,

a second substrate; and

a joint solder layer formed between the second substrate and the solder layer of the bump structure.

10. The packaging assembly of claim 9, wherein the L-shaped protection structure comprises at least one of a silicon nitride layer, a polyimide layer or combinations thereof.

11. The packaging assembly of claim 9, wherein the bump structure has a top surface substantially coplanar with an upper surface of the L-shaped protection.

12. The packaging assembly of claim 9, wherein the bump structure has a top surface lower than an upper surface of the L-shaped protection.

19. The package assembly of claim 9, wherein the bump structure further comprises a cap layer between the copper pillar and the solder layer.

13. An integrated circuit device, comprising:

a bump structure formed on a substrate, wherein the bump structure comprises a first top surface and a first sidewall surface, and the substrate comprises a surface region adjacent to the sidewall surface of the bump structure;

a cap layer over the bump structure, the cap layer having a second top surface and a second sidewall surface; and

an L-shaped protection structure covering the first sidewall surface and the second sidewall surface, and extending along the surface region of the semiconductor substrate,

wherein the second top surface is lower than an upper surface of the L-shaped protection structure, and the L-shaped protection structure is formed of a non-metal material layer.

14. The integrated circuit device of claim 13, further comprising a solder layer over the cap layer, the solder layer having a third top surface and a third sidewall surface, wherein the L-shaped protection structure covers the third sidewall surface.

15. The integrated circuit device of claim 14, wherein the upper surface of the L-shaped protection structure is substantially coplanar with the third top surface.

16. The integrated circuit device of claim 14, wherein the third top surface is lower than the upper surface of the L-shaped protection structure.

17. The integrated circuit of claim 13, wherein the bump structure comprises:

at least one under bump metallurgy (UBM) layer over the substrate; and

a conductive pillar over the at least one UBM layer.

18. The integrated circuit of claim 13, wherein the cap layer has a thickness ranging from 1 micrometer (μ

m) to 10 μ

m.