Systems and methods for automatic generation of task-splitting code

• US 9,529,622 B1
• Filed: 06/16/2015
• Issued: 12/27/2016
• Est. Priority Date: 12/09/2014
• Status: Active Grant

• Current Assignee: DataRobot, Inc.
• Original Assignee: Parallel Machines Ltd.
• Inventors: Finer, Eli, Adda, Michael, Braverman, Avner, Amar, Lior, Khermosh, Lior, Zuckerman, Gal
• Primary Examiner(s): DOAN, DUC T
• Application Number:
  US14/740,885
• Time in Patent Office: 560 Days
• Field of Search: None
• US Class Current: 1/1
• CPC Class Codes: G06F 11/3624 by performing operations on the source code, e.g. via a compiler
• CPC Class Codes: G06F 12/084 with a shared cache
• CPC Class Codes: G06F 12/0846 Cache with multiple tag or data arrays being simultaneously accessible
• CPC Class Codes: G06F 12/1081 for peripheral access to main memory, e.g. direct memory access [DMA]
• CPC Class Codes: G06F 13/1663 Access to shared memory
• CPC Class Codes: G06F 2212/154 Networked environment
• CPC Class Codes: G06F 2212/2532 comprising a plurality of modules
• CPC Class Codes: G06F 8/10 Requirements analysis; Specification techniques
• CPC Class Codes: G06F 8/451 Code distribution considering CPU load at run-time G06F9/505; load rebalancing G06F9/5083
• CPC Class Codes: G06F 9/461 Saving or restoring of program or task context
• CPC Class Codes: G06F 9/4843 by program, e.g. task dispatcher, supervisor, operating system
• CPC Class Codes: G06F 9/4881 Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
• CPC Class Codes: G06F 9/5016 the resource being the memory
• CPC Class Codes: G06F 9/5066 Algorithms for mapping a plurality of inter-dependent sub-tasks onto a plurality of physical CPUs mappping at compile time, see G06F8/451
• CPC Class Codes: G06F 9/542 Event management; Broadcasting; Multicasting; Notifications
• CPC Class Codes: G06F 9/544 Buffers; Shared memory; Pipes

Abstract

Various systems and methods to generate automatically a procedure operative to divide a processing task between two or more compute elements. A first compute element converts a code sequence into a sequence of executable instructions, which direct a second compute element to perform a first processing sub-task on a data set, and which also direct a third compute element to perform a second processing sub-task on the data set modified by the first processing sub-task. A memory module storing the data set may be embedded in a server with at least one of the compute elements. In some of the embodiments, all of the compute elements are part of a single system, whereas in alternative embodiments, at least some of the compute elements are part of two or more sub-systems.

Claims

1. A system configured to generate automatically a procedure operative to divide a processing task between at least two compute elements, comprising:

a first database configured to store a code sequence describing an action to be performed on a first data set stored in a memory module, in which the action comprises;

(i) fetching the first data set from the memory module, and (ii) performing a first processing task on said first data set fetched; and

a first compute element, having access to said first database, and configured to convert said code sequence into a sequence of executable instructions,

in which said sequence of executable instructions is operative to instruct a second compute element associated with the memory module to;

(i) access the first data set in the memory module; and

(ii) perform a first processing sub-task on said first data set accessed, thereby resulting in a modified data set,

wherein said sequence of executable instructions is further operative to instruct a third compute element to;

(i) obtain the modified data set; and

(ii) perform a second processing sub-task on said modified data set obtained,

such that said first processing sub-task together with said second processing sub-task constitute said first processing task, thereby achieving said action distributively by the second compute element and the third compute element.

2. The system of claim 1, wherein:

said second compute element is a data interface associated with the memory module, in which said data interface is in control of said memory module.

3. The system of claim 2, wherein said accessing the first data set is a random access read cycle performed by the data interface on the memory module.

4. The system of claim 1, wherein said third compute element is communicatively connected with said second compute element via a switching network through which said obtaining of the modified data set is done.

5. The system of claim 4, wherein said memory module is a part of a shared memory pool accessible to the third compute element via said switching network.

6. The system of claim 5, wherein said first processing sub-task is a stored procedure.

7. The system of claim 4, wherein said second compute element and said memory module both reside in one server.

8. The system of claim 7, wherein said third compute element resides outside said one server, and in a second server.

9. A system configured to generate and execute a procedure operative to divide a processing task between at least two compute elements, comprising:

a first database configured to store a code sequence describing an action to be performed on a first data set, in which the action comprises;

(i) accessing the first data set, and (ii) performing a first processing task on said data set accessed;

a first compute element, having access to said first database, and configured to convert said code sequence into a sequence of executable instructions;

a memory module storing said first data set;

a second compute element associated with the memory module and configured to execute said sequence of executable instructions resulting in a procedure operative to;

(i) access the first data set in the memory module; and

(ii) generate a modified data set by performing a first processing sub-task on said first data set accessed; and

a third compute element configured to execute said sequence of executable instructions resulting in continuation of the procedure operative to;

(i) obtain the modified data set; and

(ii) perform a second processing sub-task on said modified data set obtained,

in which said first processing sub-task together with said second processing sub-task constitute said first processing task, thereby achieving said action distributively by the second compute element and the third compute element.

10. The system of claim 9, wherein said conversion is performed by the first compute element just before the second compute element starts executing said sequence of executable instructions.

11. The system of claim 10, wherein said first compute element communicates the sequence of executable instructions to the second compute element and to the third compute element just before the second compute element starts executing said sequence of executable instructions.

12. The system of claim 9, wherein:

said code sequence is written in a high-level programming language; and

said conversion is a compilation process.

13. The system of claim 9, wherein the first compute element and the second compute element are a same compute element.

14. The system of claim 9, wherein the first compute element and the third compute element are a same compute element.

15. A method for generating automatically a procedure operative to divide a processing task between at least two compute elements, comprising:

receiving a code sequence describing an action to be performed on a first data set, in which the action comprises;

(i) accessing the first data set, and (ii) performing a first processing task on said first data set accessed;

recognizing, by inspecting the code sequence, that said first processing task is equivalent to performing a first processing sub-task followed by performing a second processing sub-task; and

converting, by a first compute element, according to said recognition, said code sequence into a sequence of executable instructions,

wherein said sequence of executable instructions is operative to instruct a third compute element to;

(i) send a request to a second compute element, associated with a memory module storing the first data set, to perform the first processing sub-task on the first data set, (ii) obtain from the second compute element a modified data set as a response to said request; and

(iii) perform the second processing sub-task on said modified data set obtained,

thereby achieving said action distributively by the second compute element and the third compute element.

16. The method of claim 15, wherein said sequence of executable instructions is further operative to instruct the second compute element associated with the memory module to:

(i) receive said request;

(ii) access the first data set in the memory module as a response to said request;

(iii) perform the first processing sub-task on said first data set accessed, thereby resulting in the modified data set; and

(iv) send the modified data set to the third compute element.

17. The method of claim 16, wherein said accessing is a random access read cycle performed by the second compute element on the memory module.

18. The method of claim 16, wherein said sequence of executable instructions, or at least a portion thereof that is relevant for the second compute element, is delivered to the second compute element by the third compute element during run-time of the third compute element.

19. The method of claim 18, wherein said sequence of executable instructions is delivered to the third compute element by the first compute element just before run-time of the third compute element.

20. The method of claim 16, wherein said sequence of executable instructions is delivered to the second compute element by the first compute element just before run-time of the third compute element.

21. The method of claim 15, wherein said second compute element and the memory module are associated a-priori with a stored procedure, in which said stored procedure is the first processing sub-task.

22. The method of claim 15, wherein said recognition that the first processing task is equivalent to performing the first processing sub-task followed by performing the second processing sub-task is achieved by matching the first processing task to a database comprising different combinations of sub-tasks and resulting tasks.

23. The method of claim 15, wherein said recognition that the first processing task is equivalent to performing the first processing sub-task followed by performing the second processing sub-task is achieved by concluding, from inspecting the code sequence, that the first processing task is explicitly described as the first processing sub-task followed by the second processing sub-task.

24. The method of claim 15, wherein said association of the second compute element with the memory module is identified by said first compute element during said recognition, by concluding, from inspecting the code sequence, that the first data set is of a data type that is associated with the second compute element and the memory module.

25. The method of claim 15, wherein said association of the second compute element with the memory module is identified by said third compute element during execution of the sequence of executable instructions by the third compute element, using information or operations available to the third compute element during run-time.