Methods, architecture, and apparatus for implementing machine intelligence and hierarchical memory systems
First Claim
1. A computer system comprising:
- a processor; and
a memory coupled to the processor, the memory comprising;
a first lower level processing unit configured to receive a first portion of an input data at a first time and generate a first output representing information about temporal sequences of spatial patterns in the first portion of the input data corresponding to first learned temporal sequences of spatial patterns;
a second lower level processing unit configured to receive a second portion of the input data at the first time and generate a second output representing information about temporal sequences of spatial patterns in the second portion of the input data corresponding to second learned temporal sequences of spatial patterns; and
an upper level processing unit associated with the first and second lower level processing units, the upper level processing unit configured to generate a third output based on the first and the second outputs, the third output sent to at least one of the first and second lower level processing unit as a first prediction of spatial patterns in the first portion of the input data to be received by the first lower level processing unit or the second portion of the input data to be received by the second lower level processing node at a second time subsequent to the first time.
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Abstract
Sophisticated memory systems and intelligent machines may be constructed by creating an active memory system with a hierarchical architecture. Specifically, a system may comprise a plurality of individual cortical processing units arranged into a hierarchical structure. Each individual cortical processing unit receives a sequence of patterns as input. Each cortical processing unit processes the received input sequence of patterns using a memory containing previously encountered sequences with structure and outputs another pattern. As several input sequences are processed by a cortical processing unit, it will therefore generate a sequence of patterns on its output. The sequence of patterns on its output may be passed as an input to one or more cortical processing units in next higher layer of the hierarchy. A lowest layer of cortical processing units may receive sensory input from the outside world. The sensory input also comprises a sequence of patterns.
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Citations
18 Claims
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1. A computer system comprising:
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a processor; and a memory coupled to the processor, the memory comprising; a first lower level processing unit configured to receive a first portion of an input data at a first time and generate a first output representing information about temporal sequences of spatial patterns in the first portion of the input data corresponding to first learned temporal sequences of spatial patterns; a second lower level processing unit configured to receive a second portion of the input data at the first time and generate a second output representing information about temporal sequences of spatial patterns in the second portion of the input data corresponding to second learned temporal sequences of spatial patterns; and an upper level processing unit associated with the first and second lower level processing units, the upper level processing unit configured to generate a third output based on the first and the second outputs, the third output sent to at least one of the first and second lower level processing unit as a first prediction of spatial patterns in the first portion of the input data to be received by the first lower level processing unit or the second portion of the input data to be received by the second lower level processing node at a second time subsequent to the first time. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. A computer-implemented method comprising:
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at a first lower level processing unit, generating a first output representing information about temporal sequences of spatial patterns in a first portion of an input data received at a first time corresponding to first learned temporal sequences of spatial patterns; at a second lower level processing unit, generating a second output representing information about temporal sequences of spatial patterns in a second portion of the input data received at the first time corresponding to second learned temporal sequences of spatial patterns; at an upper level processing unit, generating a third output based on the first and the second outputs, the third output representing information about causes to the input data; and sending the third output to at least one of the first and second lower level processing unit as a first prediction of spatial patterns in the first portion of the input data to be received by the first lower level processing unit or the second portion of the input data to be received by the second lower level processing node at a second time subsequent to the first time. - View Dependent Claims (14, 15, 16, 17)
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18. A non-transitory computer-readable storage medium storing instructions thereon, the instructions when executed by a processor cause the processor to:
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generate, at a first lower level processing unit, a first output representing information about temporal sequences of spatial patterns in a first portion of an input data received at a first time corresponding to first learned temporal sequences of spatial patterns; generate, at a second lower level processing unit, a second output representing information about temporal sequences of spatial patterns in a second portion of the input data received at the first time corresponding to second learned temporal sequences of spatial patterns; generate, at an upper level processing unit, a third output based on the first and the second outputs, the third output representing information about causes to the input data; and send the third output to at least one of the first and second lower level processing unit as a first prediction of spatial patterns in the first portion of the input data to be received by the first lower level processing unit or the second portion of the input data to be received by the second lower level processing node at a second time subsequent to the first time.
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Specification