System and method for direct write to MLC memory

• US 9,530,491 B1
• Filed: 11/16/2015
• Issued: 12/27/2016
• Est. Priority Date: 11/16/2015
• Status: Active Grant

• Current Assignee: SanDisk Technologies LLC (Western Digital Corporation)
• Original Assignee: SanDisk Technologies LLC (Western Digital Corporation)
• Inventors: Uttarwar, Sagar, Agarwal, Dinesh, Ratn, Prasun
• Primary Examiner(s): Nguyen, Viet Q
• Application Number:
  US14/942,456
• Time in Patent Office: 407 Days
• Field of Search: 365/185.12, 365/185.03, 365/238.5, 365/189.05
• US Class Current: 1/1
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 2212/7208 Multiple device management, e.g. distributing data over multiple flash devices
• CPC Class Codes: G06F 2212/7209 Validity control, e.g. using flags, time stamps or sequence numbers
• CPC Class Codes: G11C 11/5628 Programming or writing circuits; Data input circuits
• CPC Class Codes: G11C 16/10 Programming or data input circuits

Abstract

Apparatus and method for writing data directly to multi-level cell (MLC) memory without folding or transferring of the data from single-level cell (SLC) memory to MLC memory are disclosed. A memory device, which includes the SLC memory and MLC memory, receives data from a host device. The memory device programs the data (such as the lower/middle/upper pages) from volatile memory into MLC memory, without transferring data from SLC memory. The memory device also stores part of the data (such as the lower/middle pages) in SLC memory as a backup in case of error. In particular, if the data is not properly programmed into the MLC memory, the data in SLC memory is used to program the data a second time into the MLC memory.

Claims

1. A method for programming non-volatile memory in a memory device, a first part of the non-volatile memory configured as single-level cell (SLC) non-volatile memory and a second part of the non-volatile memory is configured as multi-level cell (MLC) non-volatile memory, the method comprising:

receiving data from a host device;

storing the data in one or more volatile memory;

storing part but not all of the data in the SLC non-volatile memory, wherein the data received from the host device comprises the part of the data stored in the SLC non-volatile memory and a remainder;

storing, using the data stored in the one or more volatile memory, the data in MLC non-volatile memory without transfer of the part of the data stored in SLC non-volatile memory from the SLC non-volatile memory;

determining whether there is an error in storing at least some of the data in the MLC non-volatile memory;

in response to determining that there is an error in storing at least some of the data in the MLC non-volatile memory;

requesting the host device to resend the remainder of the data;

receiving the remainder of the data from the host device; and

using at least a portion of the part of the data stored in the SLC non-volatile memory and the remainder of the data received from the host device to program the MLC non-volatile memory.

2. The method of claim 1, wherein storing the data in one or more volatile memory comprises storing the data in buffer random access memory (BRAM).

3. The method of claim 1, wherein the memory device further comprises one or more latches;

and

wherein storing the data in one or more volatile memory comprises storing the data into the one or more latches.

4. The method of claim 3, wherein storing part of the data in the SLC non-volatile memory comprises programming the SLC non-volatile memory using the data stored in the one or more latches;

and

wherein the part of the data stored in the SLC non-volatile memory is used to program the MLC non-volatile memory only in response to determining the error in programming the MLC non-volatile memory.

5. The method of claim 1,

wherein using at least the portion of the part of the data stored in the SLC non-volatile memory comprises:

transferring the part of the data in the SLC non-volatile memory to the one or more volatile memory; and

using the part of the data transferred from the SLC non-volatile memory to the one or more volatile memory in order to program the MLC non-volatile memory.

6. A method for programming non-volatile memory in a memory device, a first part of the non-volatile memory configured as single-level cell (SLC) non-volatile memory and a second part of the non-volatile memory is configured as multi-level cell (MLC) non-volatile memory, the method comprising:

receiving data from a host device;

storing the data in one or more volatile memory;

storing part or all of the data in the SLC non-volatile memory;

storing, using the data stored in the one or more volatile memory, the data in MLC non-volatile memory without transfer of the part or all of the data stored in SLC non-volatile memory from the SLC non-volatile memory; and

sending, by the memory device, an acknowledgement of receipt of the part of the data programmed in the SLC non-volatile memory, the sending of the acknowledgement being performed prior to completion of programming the data in the MLC non-volatile memory.

7. The method of claim 6, wherein storing the part or all of the data in the SLC non-volatile memory comprises programming a part, but less than all, of the data programmed in the MLC non-volatile memory into the SLC non-volatile memory;

wherein the data received from the host device comprises the part of the data programmed in the SLC non-volatile memory and a remainder; and

in response to determining that there is an error in storing the data in MLC non-volatile memory, further comprising sending, by the memory device, a request to the host device to resend the remainder of the data.

8. The method of claim 7, further comprising:

responsive to the request for the remainder of the data, receiving, from the host device, the remainder of the data; and

storing the remainder of the data in the one or more volatile memory, wherein using the part or all of the data transferred from the SLC non-volatile memory to the one or more volatile memory in order to program the MLC non-volatile memory comprises;

using the part of the data transferred from the SLC non-volatile memory to the one or more volatile memory and the remainder of the data stored in the one or more volatile memory in order to program the MLC non-volatile memory.

9. A memory device comprising:

one or more volatile memory;

non-volatile memory, wherein a first part of the non-volatile memory is configured as single-level cell (SLC) non-volatile memory and a second part of the non-volatile memory is configured as multi-level cell (MLC) non-volatile memory;

programming circuitry configured to program at least a part of data into SLC non-volatile memory;

transfer circuitry configured to transfer the data into the one or more volatile memory;

programming circuitry configured to program the data from the one or more volatile memory into MLC non-volatile memory without transfer of the at least a part of the data stored in SLC non-volatile memory from the SLC non-volatile memory; and

acknowledgement circuitry configured to send, in response to programming of less than all of the data into the SLC non-volatile memory, an acknowledgement to a host device of receipt of the less than all of the data.

10. The memory device of claim 9, wherein the one or more volatile memory comprises buffer random access memory (BRAM) and one or more latches;

and

wherein the transfer circuitry comprises direct memory access circuitry configured to transfer the data from the BRAM to the one or more latches.

11. The memory device of claim 9, wherein the programming circuitry is configured to program less than all of the data into the SLC non-volatile memory.

12. The memory device of claim 9, further comprising MLC programming error determination circuitry configured to determine that there is an error in programming the MLC non-volatile memory;

and

MLC reprogramming circuitry configured, in response to determining that there is an error in programming the MLC non-volatile memory, to use the at least a part of the data stored in the SLC non-volatile memory to program the MLC non-volatile memory.

13. The memory device of claim 12, wherein the data is received from the host device, the data comprises a plurality of pages;

wherein less than all of the pages are stored in the SLC memory; and

wherein all of the pages are stored in MLC memory.

14. The memory device of claim 12, the data comprises a first set of pages and a second set of pages;

wherein the first set of pages are stored in the SLC non-volatile memory;

wherein the second set of pages are not stored in the SLC non-volatile memory; and

wherein both the first set of pages and the second set of pages are stored in the MLC non-volatile memory.

15. The memory device of claim 14, wherein the acknowledgement circuitry is configured to send, in response to programming of the first set of pages into the SLC non-volatile memory, the acknowledgement to the host device of receipt of the first set of pages of memory;

and

further comprising request resend circuitry configured to, in response to determining that there is an error in programming the MLC non-volatile memory, request resending of the second set of pages.

16. The memory device of claim 15, wherein the acknowledgement circuitry is further configured to send, in response to programming of the data into the MLC non-volatile memory, acknowledgement of the second set of pages.

17. A method for programming non-volatile memory in a memory device, a first part of the non-volatile memory configured as single-level cell (SLC) non-volatile memory and a second part of the non-volatile memory is configured as multi-level cell (MLC) non-volatile memory, the method comprising:

receiving data from a host device;

storing the data in one or more volatile memory;

storing part or all of the data in single-level cell (SLC) non-volatile memory;

performing a first programming of the MLC non-volatile memory using the data stored in one or more volatile memory without using the data stored in the SLC non-volatile memory;

determining whether there is an error in the first programming of the MLC non-volatile memory; and

in response to determining that there is an error in the first programming of the MLC non-volatile memory, performing a second programming of the MLC non-volatile memory using part or all of the data stored in the SLC non-volatile memory,

wherein storing of at least a portion of the data in the SLC non-volatile memory is performed at least partly simultaneously with the storing of the at least a portion of the data in the volatile memory.

18. The method of claim 17, wherein the one or more volatile memory comprises a plurality of page latches;

and

wherein storing the data in the one or more volatile memory comprises storing the data in the plurality of page latches.

19. The method of claim 18, wherein the data comprises a plurality of pages;

wherein storing part or all of the data in the SLC non-volatile memory comprises storing less than all of the plurality of pages; and

wherein performing the first programming of the MLC non-volatile memory comprises programming all of the plurality of pages.

20. The method of claim 19, wherein the data comprises a lower page, a middle page and an upper page;

wherein storing part or all of the data in the SLC non-volatile memory comprises storing the lower page and the middle page in the SLC non-volatile memory, but not storing the upper page in the SLC non-volatile memory; and

wherein performing the first programming of the MLC non-volatile memory comprises programming the lower, middle and upper pages into the MLC non-volatile memory.

21. The method of claim 20, wherein storing the lower page in the SLC non-volatile memory is performed at least partly simultaneously with the storing of the lower page in the page latches;

and

wherein storing the middle page in the SLC non-volatile memory is not performed at least partly simultaneously with the storing of the middle page in the page latches.