Manufacturing method of semiconductor device

• US 9,530,806 B2
• Filed: 10/23/2014
• Issued: 12/27/2016
• Est. Priority Date: 09/04/2009
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Tsubuku, Masashi, Yoshitomi, Shuhei, Tsuji, Takahiro, Hosoba, Miyuki, Sakata, Junichiro, Tomatsu, Hiroyuki, Hayakawa, Masahiko
• Primary Examiner(s): Thai, Luan C
• Application Number:
  US14/521,710
• Publication Number:
  US 20150044818A1
• Time in Patent Office: 796 Days
• Field of Search: 438/149
• US Class Current: 1/1
• CPC Class Codes: H01L 21/02554 Oxides
• CPC Class Codes: H01L 21/02565 Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
• CPC Class Codes: H01L 21/02595 polycrystalline
• CPC Class Codes: H01L 21/02631 Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
• CPC Class Codes: H01L 21/02667 Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
• CPC Class Codes: H01L 27/1248 with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
• CPC Class Codes: H01L 27/1262 with a particular formation, treatment or coating of the substrate
• CPC Class Codes: H01L 27/127 with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
• CPC Class Codes: H01L 29/66765 Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

It is an object to provide a manufacturing method of a structure of a thin film transistor including an oxide semiconductor film, in which threshold voltage at which a channel is formed is positive and as close to 0 V as possible. A protective insulating layer is formed to cover a thin film transistor including an oxide semiconductor layer that is dehydrated or dehydrogenated by first heat treatment, and second heat treatment at a temperature that is lower than that of the first heat treatment, in which the increase and decrease in temperature are repeated plural times, is performed, whereby a thin film transistor including an oxide semiconductor layer, in which threshold voltage at which a channel is formed is positive and as close to 0 V as possible without depending on the channel length, can be manufactured.

Claims

1. A manufacturing method of a semiconductor device comprising the steps of:

forming a first electrode layer over a substrate having an insulating surface;

forming a first insulating layer over the first electrode layer;

forming an oxide semiconductor layer over the first insulating layer;

dehydrating or dehydrogenating the oxide semiconductor layer as a first treatment;

forming a second electrode layer and a third electrode layer over the oxide semiconductor layer;

forming a second insulating layer over the oxide semiconductor layer;

forming a third insulating layer over the second insulating layer;

forming a fourth insulating layer over the third insulating layer;

forming a fourth electrode layer over the second insulating layer; and

performing a heat treatment as a second treatment, after forming the second insulating layer,

wherein the second insulating layer contains silicon, oxygen and nitrogen,

wherein the third insulating layer contains aluminum and oxygen,

wherein the fourth insulating layer contains silicon and nitrogen, and

wherein a treatment temperature of the second treatment is lower than a treatment temperature of the first treatment.

2. The manufacturing method of a semiconductor device according to claim 1,

wherein the step of dehydrating or dehydrogenating the oxide semiconductor layer is performed in a nitrogen atmosphere or a rare gas atmosphere.

3. The manufacturing method of a semiconductor device according to claim 1,

wherein a temperature of the step of dehydrating or dehydrogenating the oxide semiconductor layer is higher than or equal to 350°

C. and lower than or equal to 750°

C.

4. The manufacturing method of a semiconductor device according to claim 1,

wherein a temperature of the heat treatment is higher than or equal to 100°

C. and lower than or equal to 300°

C.

5. The manufacturing method of a semiconductor device according to claim 1,

wherein the second insulating layer is a protective insulating layer.

16. The manufacturing method of a semiconductor device according to claim 1,

wherein the second treatment is performed after forming the fourth insulating layer.

6. A manufacturing method of a semiconductor device comprising the steps of:

forming a first gate electrode layer over a substrate having an insulating surface;

forming a first insulating layer over the first gate electrode layer;

forming an oxide semiconductor layer over the first insulating layer;

dehydrating or dehydrogenating the oxide semiconductor layer as a first treatment;

forming a source electrode layer and a drain electrode layer over the oxide semiconductor layer;

forming a second insulating layer over the oxide semiconductor layer;

forming a third insulating layer over the second insulating layer;

forming a fourth insulating layer over the third insulating layer;

forming a second gate electrode layer over the second insulating layer; and

performing a heat treatment as a second treatment, after forming the second insulating layer,

wherein the second insulating layer contains silicon, oxygen and nitrogen,

wherein the third insulating layer contains aluminum and oxygen,

wherein the fourth insulating layer contains silicon and nitrogen, and

wherein a thickness of the oxide semiconductor layer is greater than or equal to 5 nm and less than or equal to 200 nm, and

wherein a treatment temperature of the second treatment is lower than a treatment temperature of the first treatment.

7. The manufacturing method of a semiconductor device according to claim 6,

wherein the step of dehydrating or dehydrogenating the oxide semiconductor layer is performed in a nitrogen atmosphere or a rare gas atmosphere.

8. The manufacturing method of a semiconductor device according to claim 6,

wherein a temperature of the step of dehydrating or dehydrogenating the oxide semiconductor layer is higher than or equal to 350°

C. and lower than or equal to 750°

C.

9. The manufacturing method of a semiconductor device according to claim 6,

wherein a temperature of the heat treatment is higher than or equal to 100°

C. and lower than or equal to 300°

C.

10. The manufacturing method of a semiconductor device according to claim 6,

wherein the second insulating layer is a protective insulating layer.

17. The manufacturing method of a semiconductor device according to claim 6,

wherein the second treatment is performed after forming the fourth insulating layer.

11. A manufacturing method of a semiconductor device comprising the steps of:

forming a first gate electrode layer over a substrate having an insulating surface;

forming a first insulating layer over the first gate electrode layer;

forming an oxide semiconductor layer over the first insulating layer;

dehydrating or dehydrogenating the oxide semiconductor layer as a first treatment;

forming a source electrode layer and a drain electrode layer over the oxide semiconductor layer;

forming a second insulating layer over the oxide semiconductor layer;

forming a third insulating layer over the second insulating layer;

forming a fourth insulating layer over the third insulating layer;

forming a second gate electrode layer over the second insulating layer; and

performing a heat treatment as a second treatment, after forming the second insulating layer,

wherein the second insulating layer contains silicon, oxygen and nitrogen,

wherein the third insulating layer contains aluminum and oxygen,

wherein the fourth insulating layer contains silicon and nitrogen,

wherein a thickness of the oxide semiconductor layer is greater than or equal to 5 nm and less than or equal to 200 nm,

wherein a treatment temperature of the second treatment is lower than a treatment temperature of the first treatment,

wherein the oxide semiconductor layer contains indium, gallium and zinc, and

wherein the first insulating layer is a stacked-layer structure of a first layer containing silicon and nitrogen and a second layer containing silicon and oxygen.

12. The manufacturing method of a semiconductor device according to claim 11,

wherein the step of dehydrating or dehydrogenating the oxide semiconductor layer is performed in a nitrogen atmosphere or a rare gas atmosphere.

13. The manufacturing method of a semiconductor device according to claim 11,

wherein a temperature of the step of dehydrating or dehydrogenating the oxide semiconductor layer is higher than or equal to 350°

C. and lower than or equal to 750°

C.

14. The manufacturing method of a semiconductor device according to claim 11,

wherein a temperature of the heat treatment is higher than or equal to 100°

C. and lower than or equal to 300°

C.

15. The manufacturing method of a semiconductor device according to claim 11,

wherein the second insulating layer is a protective insulating layer.

18. The manufacturing method of a semiconductor device according to claim 11,

wherein the second treatment is performed after forming the fourth insulating layer.